Datasheet > EN2390QI

EN2390QI

更新时间： 2022-05-05 08:45:03

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ENPIRION		/
页数	文件大小	规格书
21页	791K
描述
9A Voltage Mode Synchronous Buck PWM

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EN2390QI 数据手册

EN2390QI

Electrical Characteristics

NOTE: V_IN=12V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.

Typical values are at T_A= 25°C.

PARAMETER

Operating Input Voltage

SYMBOL

PVIN

TEST CONDITIONS

MIN TYP MAX UNITS

14.0

4.5

Controller Input Voltage

AVIN

2.5

5.5

PVIN Under Voltage

Lock-out

Voltage above which UVLO is not

asserted

UVLO_PVIN

AVIN_UVLOR

AVIN Under Voltage

Lock-out rising

Voltage above which UVLO is not

asserted

2.3

AVIN Under Voltage

Lock-out falling

Voltage below which UVLO is

asserted

AVIN_OVLOF

I_AVIN

2.1

AVIN pin Input Current

TBD

Internal Linear

Regulator Output

Voltage

AVINO

3.3

IPVIN_S

IAVIN_S

PVIN=12V, AVIN=3.3, ENABLE=0V

300

µA

Shut-Down Supply

Current

Feedback node voltage at:

Feedback Pin Voltage

V_FB

0.594

0.588

0.60

0.606

0.612

VIN = 12V, ILOAD = 0, TA = 25°C

Feedback node voltage at:

4.5V ≤ V^IN≤ 14V

V_FB

0A ≤ ILOAD ≤ 9A, T = -40 to 85°C

VFB pin input leakage current

(Note 3)

Feedback pin Input

Leakage Current

I_FB

t_RISE

-5

V_OUTRise Time

C_SS= 47nF (Note 4 and Note 5)

1.5

2.0

2.5

Soft Start Capacitor

Range

C_{SS_RANGE}

TBD

Maximum Continuous

Output Current

I_{OUT_Max_Cont}

Over Current Trip Level

Disable Threshold

I_OCP

Reference Table 2

13.5

V_DISABLE

V_ENABLE

ENABLE pin logic Low.

ENABLE pin logic High

0.0

1.8

0.6

ENABLE Threshold

ENABLE Lockout Time

AVIN

T_ENLOCKOUT

ENABLE pin Input

Current

I_ENABLE

F_SW

180kΩ pull down (Note 3)

RFADJ =3kΩ

µA

Switching Frequency

1.0

MHz

External SYNC Clock

Frequency Lock Range

F_{PLL_LOCK}

Range of SYNC clock frequency

0.8

1.8

1.6

S_IN Threshold – Low

S_IN Threshold – High

S_OUT Threshold – Low

V_{S_IN_LO}

V_{S_IN_HI}

S_IN clock logic low level

S_IN clock logic high level

S_OUT clock logic low level

0.8

2.5

0.8

V_{S_OUT_LO}

S_OUT Threshold –

High

V_{S_OUT_HI}

POK_LT

S_OUT clock logic high level

2.5

Output voltage as a fraction of

expected output voltage

POK Lower Threshold

Enpirion Confidential

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