EFR32BG21B Gecko Wireless SoC Family Data Sheet
System Overview
3. System Overview
3.1 Introduction
The EFR32 product family combines an energy-friendly MCU with a high performance radio transceiver. The devices are well suited for
secure connected IoT multiprotocol devices requiring high performance and low energy consumption. This section gives a short intro-
duction to the full radio and MCU system. The detailed functional description can be found in the EFR32xG21 Reference Manual.
A block diagram of the EFR32BG21B family is shown in Figure 3.1 Detailed EFR32BG21B Block Diagram on page 7. The diagram
shows a superset of features available on the family, which vary by OPN. For more information about specific device features, consult
Ordering Information.
Radio Transciever
Port I/O Configuration
Digital Peripherals
IOVDD
RF Frontend
DEMOD
IFADC
AGC
I
LNA
Q
PGA
RF2G4_IO1
RF2G4_IO2
LETIMER
PA
PA
Port A
Drivers
PAn
Frequency
Synthesizer
TIMER
RTC
MOD
Port B
PBn
PCn
PDn
Drivers
USART
I2C
Port
Mapper
Reset
Management
Unit
Port C
Drivers
ARM Cortex-M33 Core
RESETn
Serial Wire
and ETM
Debug /
Up to 1024 kB Flash
Program Memory
Debug Signals
(shared w/GPIO)
Brown Out /
Power-On
Reset
Crypto
Accelerator
Port D
Drivers
Up to 96 KB RAM
TrustZone
Programming
A
H
B
A
P
B
TRNG
CRC
Floating Point Unit
DMA Controller
Energy Management
PAVDD
RFVDD
IOVDD
AVDD
Analog Peripherals
Watchdog
Timer
Internal
Reference
DVDD
Clock Management
ULFRCO
Voltage
Regulator
VDD
12-bit ADC
FSRCO
HFRCOEM2
LFRCO
LFXO
DECOUPLE
LFXTAL_I
LFXTAL_O
HFXTAL_I
HFXTAL_O
+
-
HFRCO
HFXO
Analog Comparator
Figure 3.1. Detailed EFR32BG21B Block Diagram
3.2 Radio
The EFR32BG21B features a highly configurable radio transceiver supporting the Bluetooth Low Energy wireless protocol.
3.2.1 Antenna Interface
The 2.4 GHz antenna interface consists of two single-ended pins (RF2G4_IO1 and RF2G4_IO2) that interface directly to two LNAs and
two 10 dBm PAs. For devices that support 20 dBm, these pins also interface to the 20 dBm on-chip balun. Integrated switches select
either RF2G4_IO1 or RF2G4_IO2 to be the active path.
The external components and power supply connections for the antenna interface typical applications are shown in the RF Matching
Networks section.
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