DS320PR822
SNLS714 – SEPTEMBER 2022
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.5
–0.5
–0.5
–0.5
–0.5
MAX
4.0
UNIT
V
VCCABSMAX
VIOCMOS,ABSMAX
VIO5LVL,ABSMAX
VIOHS-RX,ABSMAX
VIOHS-TX,ABSMAX
TJ,ABSMAX
Supply Voltage (VCC)
3.3 V LVCMOS and Open Drain I/O voltage
5-level Input I/O voltage
4.0
V
2.75
3.2
V
High-speed I/O voltage (RXnP, RXnN)
High-speed I/O voltage (TXnP, TXnN)
Junction temperature
V
2.75
150
150
V
°C
°C
Tstg
Storage temperature range
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not
sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality,
performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as ±2 kV
may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
DC plus AC power should not
exceed these limits
VCC
NVCC
Supply voltage, VCC to GND
Supply noise tolerance
3.0
3.3
3.6
V
DC to <50 Hz, sinusoidal1
250
100
33
mVpp
mVpp
mVpp
50 Hz to 500 kHz, sinusoidal1
500 kHz to 2.5 MHz, sinusoidal1
Supply noise, >2.5 MHz,
sinusoidal1
10
mVpp
TRampVCC
VCC supply ramp time
From 0 V to 3.0 V
0.150
−40
100
85
ms
°C
°C
TA
TJ
Operating ambient temperature
Operating junction temperature
Minimum pulse width required for
All device modes
125
PD1/0, SEL1/0, and
READ_EN_N
PWLVCMOS the device to detect a valid signal
on LVCMOS inputs
200
μs
SMBus/I2C SDA and SCL Open Supply voltage for open drain
VCCSMBUS
FSMBus
3.6
V
Drain Termination Voltage
pull-up resistor
SMBus/I2C clock (SCL) frequency
in SMBus secondary mode
10
400
kHz
Source differential launch
amplitude
VIDLAUNCH
DR
800
1
1200
32
mVpp
Gbps
Data rate
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