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DS2404B PDF预览

DS2404B

更新时间: 2024-01-27 18:21:18
品牌 Logo 应用领域
达拉斯 - DALLAS 计时器或实时时钟微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
28页 664K
描述
EconoRAM Time Chip

DS2404B 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.300 INCH, SOIC-16针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
其他特性:1 HZ FIXED O/P; 64-BIT LASERED ROM; TIMEKEEPING CURRENT = 350NA最大时钟频率:0.032 MHz
信息访问方法:SERIAL, 3-WIREJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:10.3 mm
湿度敏感等级:1端子数量:16
计时器数量:最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
uPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCKBase Number Matches:1

DS2404B 数据手册

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DS2404  
Setting a write protect bit to a logic 1 will permanently write protect the corresponding counter and alarm  
registers, all write protect bits, and additional bits in the control register. The write protect bits can not be  
written in a normal manner (see Write Protect/Programmable Expiration” section).  
RO Read Only  
3
If a programmable expiration occurs and the read only bit is set to a logic 1, then the DS2404 becomes  
read only. If a programmable expiration occurs and the read only bit is a logic 0, then only the 64-bit  
lasered ROM can be accessed (see Write Protect/Programmable Expiration” section).  
OSC Oscillator enable  
4
This bit controls the crystal oscillator. When set to a logic 1, the oscillator will start operation. When the  
oscillator bit is a logic 0, the oscillator will stop.  
5
AUTO/ MAN  
Automatic/ Manual Mode  
When this bit is set to a logic 1, the interval timer is in automatic mode. In this mode, the interval timer is  
enabled by the I/O line. When this bit is set to a logic 0, the interval timer is in manual mode. In this  
mode the interval timer is enabled by the STOP/START bit.  
Stop/Start (in Manual Mode)  
6
STOP/START  
If the interval timer is in manual mode, the interval timer will start counting when this bit is set to a logic  
0 and will stop counting when set to a logic 1. If the interval timer is in automatic mode, this bit has no  
effect.  
DSEL Delay Select Bit  
7
This bit selects the delay that it takes for the cycle counter and the interval timer (in auto mode) to see a  
transition on the I/O line. When this bit is set to a logic 1, the delay time is 123 + 2 ms. This delay allows  
communication on the I/O line without starting or stopping the interval timer and without incrementing  
the cycle counter. When this bit is set to a logic 0, the delay time is 3.5 ±0.5 ms.  
MEMORY FUNCTION COMMANDS  
The Memory Function Flow Chart” (Figure 6) describes the protocols necessary for accessing the  
memory. Two examples follow the flowchart. Three address registers are provided as shown in Figure 5.  
The first two registers represent a 16-bit target address (TA1, TA2). The third register is the ending  
offset/data status byte (E/S).  
The target address points to a unique byte location in memory. The first five bits of the target address  
(T4:T0) represent the byte offset within a page. This byte offset points to one of 32 possible byte  
locations within a given page. For instance, 00000b points to the first byte of a page where as 11111b  
would point to the last byte of a page.  
8 of 28  
020998  

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