Datasheet > DS1822-PAR_07

DS1822-PAR_07

更新时间： 2022-10-27 16:18:14

品牌	Logo	应用领域
达拉斯 - DALLAS		/
页数	文件大小	规格书
19页	207K
描述
Econo 1-Wire Parasite-Power Digital Thermometer

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DS1822-PAR_07 数据手册

DS1822-PAR

DETAILED PIN DESCRIPTIONS Table 1

PIN SYMBOL DESCRIPTION

GND

Ground.

Data Input/Output pin. Open-drain 1-Wire interface pin. Also provides power

to the device when used in parasite power mode (see “Parasite Power” section.)

No Connect. Doesn’t connect to internal circuit.

OVERVIEW

The DS1822-PAR uses Dallas’ exclusive 1-Wire bus protocol that implements bus communication using

one control signal. The control line requires a weak pullup resistor since all devices are linked to the bus

via a 3-state or open-drain port (the DQ pin in the case of the DS1822-PAR). In this bus system, the

microprocessor (the master device) identifies and addresses devices on the bus using each device’s unique

64-bit code. Because each device has a unique code, the number of devices that can be addressed on one

bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of the commands and

“time slots,” is covered in the 1-WIRE BUS SYSTEM section of this data sheet.

An important feature of the DS1822-PAR is its ability to operate without an external power supply.

Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The

high bus signal also charges an internal capacitor (C_PP), which then supplies power to the device when the

bus is low. This method of deriving power from the 1-Wire bus is referred to as “parasite power.”

Figure 1 shows a block diagram of the DS1822-PAR, and pin descriptions are given in Table 1. The

64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte

temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad

provides access to the 1-byte upper and lower alarm trigger registers (T_Hand T_L). The T_Hand T_Lregisters

are NV (EEPROM), so they will retain their data when the device is powered down.

DS1822-PAR BLOCK DIAGRAM Figure 1

V_PU

PARASITE POWER

4.7K

MEMORY CONTROL

CIRCUIT

DS1822-PAR

LOGIC

TEMPERATURE SENSOR

64-BIT ROM

AND

1-wire PORT

INTERNAL V_DD

ALARM HIGH TRIGGER (T_H)

SCRATCHPAD

C_PP

ALARM LOW TRIGGER (T_L)

CONFIGURATION REGISTER

(EEPROM)

GND

8-BIT CRC GENERATOR

2 of 19

123 4 5 6 7...19

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