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DS15BR400TVSX/NOPB PDF预览

DS15BR400TVSX/NOPB

更新时间: 2024-01-09 17:53:51
品牌 Logo 应用领域
德州仪器 - TI 驱动中继器接口集成电路驱动器
页数 文件大小 规格书
23页 624K
描述
具有预加重功能的 4 通道 LVDS 缓冲器/中继器 | PFB | 48 | -40 to 85

DS15BR400TVSX/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:TFQFP, TQFP48,.35SQ
Reach Compliance Code:compliantECCN代码:5A991.B.1
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.25Samacsys Description:LVDS Interface IC 4ch LVDS Buffer/Repeater
差分输出:YES驱动器位数:4
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:GENERAL PURPOSEJESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
湿度敏感等级:3功能数量:4
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:2 V
输出特性:DIFFERENTIAL最大输出低电流:0.00001 A
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP封装等效代码:TQFP48,.35SQ
封装形状:SQUARE封装形式:FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:2 ns
接收器位数:4座面最大高度:1.2 mm
子类别:Line Driver or Receivers最大压摆率:215 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V电源电压1-最大:3.6 V
电源电压1-分钟:3 V电源电压1-Nom:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:2 ns
宽度:7 mm

DS15BR400TVSX/NOPB 数据手册

 浏览型号DS15BR400TVSX/NOPB的Datasheet PDF文件第2页浏览型号DS15BR400TVSX/NOPB的Datasheet PDF文件第3页浏览型号DS15BR400TVSX/NOPB的Datasheet PDF文件第4页浏览型号DS15BR400TVSX/NOPB的Datasheet PDF文件第6页浏览型号DS15BR400TVSX/NOPB的Datasheet PDF文件第7页浏览型号DS15BR400TVSX/NOPB的Datasheet PDF文件第8页 
DS15BR400, DS15BR401  
www.ti.com  
SNLS224G AUGUST 2006REVISED APRIL 2013  
Electrical Characteristics (continued)  
Over recommended operating supply and temperature ranges unless other specified.  
Typ  
Symbol  
Parameter  
Conditions  
Min  
Max  
Units  
(1)  
LVDS INPUT DC SPECIFICATIONS (INn±)  
VTH  
VTL  
Differential Input High  
Threshold  
VCM = 0.8V to 3.55V,  
VDD = 3.6V  
0
0
100  
mV  
mV  
(2)  
Differential Input Low  
VCM = 0.8V to 3.55V,  
VDD = 3.6V  
100  
(2)  
Threshold  
VID  
Differential Input Voltage  
VCM = 0.8V to 3.55V, VDD = 3.6V  
100  
2400  
3.55  
mV  
V
VCMR  
CIN2  
IIN  
Common Mode Voltage Range VID = 150 mV, VDD = 3.6V  
0.05  
LVDS Input Capacitance  
Input Current  
IN+ or INto VSS  
3.0  
pF  
µA  
µA  
VIN = 3.6V, VDD = 3.6V  
VIN = 0V, VDD = 3.6V  
10  
10  
+10  
+10  
LVDS OUTPUT DC SPECIFICATIONS (OUTn±)  
VOD  
Differential Output Voltage,  
0% Pre-emphasis  
RL = 100external resistor between OUT+ and OUT−  
Figure 5  
250  
360  
500  
mV  
(2)  
ΔVOD  
Change in VOD between  
Complementary States  
35  
1.05  
35  
35  
1.475  
35  
mV  
V
(3)  
VOS  
Offset Voltage  
1.18  
ΔVOS  
Change in VOS between  
Complementary States  
mV  
COUT  
IOS  
LVDS Output Capacitance  
Output Short Circuit Current  
OUT+ or OUTto VSS  
2.5  
21  
6
pF  
mA  
mA  
OUT+ or OUTShort to GND  
OUT+ or OUTShort to VDD  
40  
40  
SUPPLY CURRENT (Static)  
ICC  
Supply Current  
All inputs and outputs enabled and active, terminated with  
differential load of 100between OUT+ and OUT-. PEM = L  
175  
20  
215  
200  
mA  
µA  
ICCZ  
Supply Current - Power Down PWDN = L, PEM = L  
Mode  
SWITCHING CHARACTERISTICS—LVDS OUTPUTS  
tLHT  
Differential Low to High  
Transition Time  
Use an alternating 1 and 0 pattern at 200 Mbps, measure  
170  
170  
1.0  
250  
250  
2.0  
ps  
ps  
ns  
(4)  
between 20% and 80% of VOD  
.
Figure 6 , Figure 8  
tHLT  
Differential High to Low  
(4)  
Transition Time  
tPLHD  
tPHLD  
Differential Low to High  
Propagation Delay  
Use an alternating 1 and 0 pattern at 200 Mbps, measure at  
50% VOD between input to output.  
Figure 6 , Figure 7  
Differential High to Low  
Propagation Delay  
1.0  
10  
25  
2.0  
60  
ns  
ps  
ps  
ps  
(4)  
tSKD1  
tSKCC  
Pulse Skew  
|tPLHD–tPHLD|  
Output Channel to Channel  
Difference in propagation delay (tPLHD or tPHLD) among all  
output channels.  
75  
(4)  
Skew  
(4)  
tSKP  
Part to Part Skew  
Common edge, parts at same temp and VCC  
550  
(2) Differential output voltage VOD is defined as ABS(OUT+–OUT). Differential input voltage VID is defined as ABS(IN+–IN).  
(3) Output offset voltage VOS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.  
(4) Not production tested. Ensured by a statistical analysis on a sample basis at the time of characterization.  
Copyright © 2006–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
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Product Folder Links: DS15BR400 DS15BR401  

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