July 1995
DP83932C-20/25/33 MHz SONICTM
Systems-Oriented Network Interface Controller
General Description
The SONIC (Systems-Oriented Network Interface Control-
ler) is a second-generation Ethernet Controller designed to
meet the demands of today’s high-speed 32- and 16-bit sys-
tems. Its system interface operates with a high speed DMA
that typically consumes less than 3% of the bus bandwidth
(25 MHz bus clock). Selectable bus modes provide both big
and little endian byte ordering and a clean interface to stan-
dard microprocessors. The linked-list buffer management
system of SONIC offers maximum flexibility in a variety of
environments from PC-oriented adapters to high-speed
motherboard designs. Furthermore, the SONIC integrates a
fully-compatible IEEE 802.3 Encoder/Decoder (ENDEC) al-
lowing for a simple 2-chip solution for Ethernet when the
SONIC is paired with the DP8392 Coaxial Transceiver Inter-
face or a 10BASE-T transceiver.
management uses two areas in memory: one for indicating
status and control information and the other for fetching
packet data. The system can create a transmit queue allow-
ing multiple packets to be transmitted from a single transmit
command. The packet data can reside on any arbitrary byte
boundary and can exist in several non-contiguous locations.
Features
Y
32-bit non-multiplexed address and data bus
Y
High-speed, interruptible DMA
Y
Linked-list buffer management maximizes flexibility
Y
Two independent 32-byte transmit and receive FIFOs
Y
Bus compatibility for all standard microprocessors
Y
Supports big and little endian formats
Y
Integrated IEEE 802.3 ENDEC
For increased performance, the SONIC implements
a
Y
Complete address filtering for up to 16 physical and/or
multicast addresses
unique buffer management scheme to efficiently process,
receive and transmit packets in system memory. No inter-
mediate packet copy is necessary. The receive buffer man-
agement uses three areas in memory for (1) allocating addi-
tional resources, (2) indicating status information, and (3)
buffering packet data. During reception, the SONIC stores
packets in the buffer area, then indicates receive status and
control information in the descriptor area. The system allo-
cates more memory resources to the SONIC by adding de-
scriptors to the memory resource area. The transmit buffer
Y
32-bit general-purpose timer
Y
Full-duplex loopback diagnostics
Y
Fabricated in low-power CMOS
Y
132 PQFP package
Y
Full network management facilities support the 802.3
layer management standard
Y
Integrated support for bridge and repeater applications
System Diagram
TL/F/10492–2
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
SONICTM is a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/10492
RRD-B30M105/Printed in U. S. A.