Datasheet > DP83848I_08

DP83848I_08

更新时间： 2022-12-28 03:03:58

品牌	Logo	应用领域
美国国家半导体 - NSC		以太网局域网（LAN）标准
页数	文件大小	规格书
84页	2823K
描述
PHYTER® - Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

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DP83848I_08 数据手册

1.0 Pin Descriptions

The DP83848I pins are classified into the following inter- Note: Strapping pin option. Please see Section 1.7 for strap

face categories (each interface is described in the sections

that follow):

definitions.

All DP83848I signal pins are I/O cells regardless of the par-

ticular use. The definitions below define the functionality of

the I/O cells for each pin.

— Serial Management Interface

— MAC Data Interface

— Clock Interface

Type: I

Input

— LED Interface

Type: O

Type: I/O

Type OD

Output

— JTAG Interface

Input/Output

Open Drain

— Reset and Power Down

— Strap Options

Type: PD,PU Internal Pulldown/Pullup

Type: S Strapping Pin (All strap pins have weak in-

— 10/100 Mb/s PMD Interface

— Special Connect Pins

— Power and Ground pins

ternal pull-ups or pull-downs. If the default

strap value is needed to be changed then an

external 2.2 kΩ resistor should be used.

Please see Section 1.7 for details.)

1.1 Serial Management Interface

Signal Name

Type

Pin #

Description

MDC

MANAGEMENT DATA CLOCK: Synchronous clock to the MDIO

management data input/output serial interface which may be

asynchronous to transmit and receive clocks. The maximum clock

rate is 25 MHz with no minimum clock rate.

MDIO

I/O

MANAGEMENT DATA I/O: Bi-directional management instruc-

tion/data signal that may be sourced by the station management

entity or the PHY. This pin requires a 1.5 kΩ pullup resistor.

1.2 MAC Data Interface

Signal Name

Type

Pin #

Description

TX_CLK

MII TRANSMIT CLOCK: 25 MHz Transmit clock output in 100

Mb/s mode or 2.5 MHz in 10 Mb/s mode derived from the 25 MHz

reference clock.

Unused in RMII mode. The device uses the X1 reference clock in-

put as the 50 MHz reference for both transmit and receive.

SNI TRANSMIT CLOCK: 10 MHz Transmit clock output in 10 Mb

SNI mode. The MAC should source TX_EN and TXD_0 using this

clock.

TX_EN

I, PD

MII TRANSMIT ENABLE: Active high input indicates the pres-

ence of valid data inputs on TXD[3:0].

RMII TRANSMIT ENABLE: Active high input indicates the pres-

ence of valid data on TXD[1:0].

SNI TRANSMIT ENABLE: Active high input indicates the pres-

ence of valid data on TXD_0.

TXD_0

TXD_1

TXD_2

TXD_3

MII TRANSMIT DATA: Transmit data MII input pins, TXD[3:0],

that accept data synchronous to the TX_CLK (2.5 MHz in 10 Mb/s

mode or 25 MHz in 100 Mb/s mode).

RMII TRANSMIT DATA: Transmit data RMII input pins, TXD[1:0],

that accept data synchronous to the 50 MHz reference clock.

S, I, PD

SNI TRANSMIT DATA: Transmit data SNI input pin, TXD_0, that

accept data synchronous to the TX_CLK (10 MHz in 10 Mb/s SNI

mode).

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与DP83848I_08相关器件

型号	品牌	描述	获取价格	数据表
DP83848I_14	TI	PHYTER Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver	获取价格
DP83848IVV	ETC	DP83848I PHYTER® - Industrial Temperature	获取价格
DP83848IVV/NOPB	ROCHESTER	DATACOM, ETHERNET TRANSCEIVER, PQFP48, 7 X 7 MM, GREEN, LQFP-48	获取价格
DP83848IVV/NOPB	TI	支持 SNI 和 JTAG 接口、具有工业级温度范围的 10/100Mbps 以太网 PH	获取价格
DP83848IVV-NOPB	TI	DP83848I PHYTER Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Tra	获取价格
DP83848IVVX	TI	DP83848I PHYTER Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Tra	获取价格

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