May 2007
DP83816-EX 10/100 Mb/s Integrated PCI Ethernet Media Access
Controller and Physical Layer (MacPHYTER-II™)
Extended Temperature Range 0oC to 85oC
— Support for IEEE 802.3x Full duplex flow control
General Description
— Extremely flexible Rx packet filtration including: single
DP83816-EX is a single-chip 10/100 Mb/s Ethernet
address perfect filter with MSb masking, broadcast, 512
Controller for the PCI bus. It is targeted at single board
entry multicast/unicast hash table, deep packet pattern
computers for embedded applications requiring a high
matching for up to 4 unique patterns
speed PCI bus. The DP83816-EX fully implements the
— Statistics gathered for support of RFC 1213 (MIB II),
RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing
CPU overhead for management
V2.2 33 MHz PCI bus interface for host communications
with power management support. Packet descriptors and
data are transferred via bus-mastering, reducing the
burden on the host CPU. The DP83816-EX can support full
duplex 10/100 Mb/s transmission and reception, with
minimum interframe gap.
— Internal 2 KB Transmit and 2 KB Receive data FIFOs
— Serial EEPROM port with auto-load of configuration data
from EEPROM at power-on
The DP83816-EX device is an integration of an enhanced
version of the National Semiconductor PCI MAC/BIU
(Media Access Controller/Bus Interface Unit) and a 3.3V
CMOS physical layer interface.
— Flash/PROM interface for remote boot support
— Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical
layer
— IEEE 802.3 10BASE-T transceiver with integrated filters
— IEEE 802.3u 100BASE-TX transceiver
Features
— IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports
traditional data rates of 10 Mb/s Ethernet and 100 Mb/s
Fast Ethernet (via internal phy)
— Fully integrated ANSI X3.263 compliant TP-PMD
physical sublayer with adaptive equalization and
Baseline Wander compensation
— Bus master - burst sizes of up to 128 dwords (512 bytes)
— IEEE 802.3u Auto-Negotiation - advertised features
configurable via EEPROM
— BIU compliant with PC 97 and PC 98 Hardware Design
Guides, PC 99 Hardware Design Guide draft, ACPI v1.0,
PCI Power Management Specification v1.1, OnNow
Device Class Power Management Reference
Specification - Network Device Class v1.0a
— Full Duplex support for 10 and 100 Mb/s data rates
— Single 25 MHz reference clock
— 144-pin LQFP package
— Low power 3.3V CMOS design with typical consumption
of 383 mW operating, 297 mW during WOL and 53 mW
during sleep mode
— Wake on LAN (WOL) support compliant with PC98,
PC99, SecureOn, and OnNow, including directed
packets, Magic Packet , VLAN packets, ARP packets,
pattern match packets, and Phy status change
— IEEE 802.3u MII for connecting alternative external
Physical Layer Devices
— Clkrun function for PCI Mobile Design Guide
— Virtual LAN (VLAN) and long frame support
— 3.3V signalling with 5V tolerant I/O
System Diagram
PCI Bus
10/100 Twisted Pair
Isolation
DP83816-EX
BIOS ROM EEPROM
(optional)
(optional)
MacPHYTER-II is a trademark of National Semiconductor Corporation.
Magic Packet is a trademark of Advanced Micro Devices, Inc.
© 2007 National Semiconductor Corporation
www.national.com