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DP83815DVNG

更新时间： 2024-01-23 10:06:32

品牌	Logo	应用领域
美国国家半导体 - NSC		控制器 PC 以太网局域网（LAN）标准
页数	文件大小	规格书
108页	777K
描述
10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter)

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DP83815DVNG 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	LFQFP, QFP144,.87SQ,20	Reach Compliance Code：	compliant
HTS代码：	8542.31.00.01	风险等级：	5.74
地址总线宽度：	32	边界扫描：	NO
总线兼容性：	PCI	最大时钟频率：	25 MHz
数据编码/解码方法：	NRZ; NRZI; BIPH-LEVEL(MANCHESTER)	最大数据传输速率：	12.5 MBps
外部数据总线宽度：	32	JESD-30 代码：	S-PQFP-G144
JESD-609代码：	e3	长度：	20 mm
低功率模式：	YES	湿度敏感等级：	3
串行 I/O 数：	2	端子数量：	144
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装等效代码：	QFP144,.87SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	子类别：	Serial IO/Communication Controllers
最大压摆率：	225 mA	最大供电电压：	3.6 V
最小供电电压：	3 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	20 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：	1

DP83815DVNG 数据手册

September 2002

DP83815 10/100 Mb/s Integrated PCI Ethernet Media Access

Controller and Physical Layer (MacPhyter^™)

— Virtual LAN (VLAN) and long frame support

General Description

— Support for IEEE 802.3x Full duplex flow control

DP83815 is a single-chip 10/100 Mb/s Ethernet Controller

for the PCI bus. It is targeted at low-cost, high volume PC

mother boards, adapter cards, and embedded systems.

The DP83815 fully implements the V2.2 33 MHz PCI bus

interface for host communications with power management

support. Packet descriptors and data are transferred via

bus-mastering, reducing the burden on the host CPU. The

DP83815 can support full duplex 10/100 Mb/s transmission

and reception, with minimum interframe gap.

— Extremely flexible Rx packet filtration including: single

address perfect filter with MSb masking, broadcast, 512

entry multicast/unicast hash table, deep packet pattern

matching for up to 4 unique patterns

— Statistics gathered for support of RFC 1213 (MIB II),

RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing

CPU overhead for management

— Internal 2 KB Transmit and 2 KB Receive data FIFOs

The DP83815 device is an integration of an enhanced

version of the National Semiconductor PCI MAC/BIU

(Media Access Controller/Bus Interface Unit) and a 3.3V

CMOS physical layer interface.

— Serial EEPROM port with auto-load of configuration data

from EEPROM at power-on

— Flash/PROM interface for remote boot support

— Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical

layer

Features

— IEEE 802.3 10BASE-T transceiver with integrated filters

— IEEE 802.3u 100BASE-TX transceiver

— IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports

traditional data rates of 10 Mb/s Ethernet and 100 Mb/s

Fast Ethernet (via internal phy)

— Fully integrated ANSI X3.263 compliant TP-PMD

physical sublayer with adaptive equalization and

Baseline Wander compensation

— Bus master - burst sizes of up to 128 dwords (512 bytes)

— IEEE 802.3u Auto-Negotiation - advertised features

configurable via EEPROM

— BIU compliant with PC 97 and PC 98 Hardware Design

Guides, PC 99 Hardware Design Guide draft, ACPI v1.0,

PCI Power Management Specification v1.1, OnNow

Device Class Power Management Reference

Specification - Network Device Class v1.0a

— Full Duplex support for 10 and 100 Mb/s data rates

— Single 25 MHz reference clock

— 144-pin LQFP and 160-pin LBGA packages

— Wake on LAN (WOL) support compliant with PC98,

PC99, SecureOn, and OnNow, including directed

packets, Magic Packet , VLAN packets, ARP packets,

pattern match packets, and Phy status change

— Low power 3.3V CMOS design with typical consumption

of 561 mW operating, 380 mW during WOL mode, 33

mW sleep mode

— IEEE 802.3u MII for connecting alternative external

Physical Layer Devices

— Clkrun function for PCI Mobile Design Guide

System Diagram

PCI Bus

10/100 Twisted Pair

Isolation

DP83815

BIOS ROM EEPROM

(optional)

TRI-STATE is a registered trademark of National Semiconductor Corporation.

Magic Packet is a trademark of Advanced Micro Devices, Inc.

www.national.com

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与DP83815DVNG相关器件

型号	品牌	描述	获取价格	数据表
DP83815DVNG/NOPB	NSC	IC 2 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144, LQFP-144, Serial IO/Com	获取价格
DP83815DVNG-AB/NOPB	TI	2 CHANNEL(S), 100Mbps, LOCAL AREA NETWORK CONTROLLER, PQFP144, LQFP-144	获取价格
DP83815DVNG-AP	TI	2 CHANNEL(S), 100Mbps, LOCAL AREA NETWORK CONTROLLER, PQFP144, LQFP-144	获取价格
DP83815DVNG-AP/NOPB	TI	2 CHANNEL(S), 100Mbps, LOCAL AREA NETWORK CONTROLLER, PQFP144, LQFP-144	获取价格
DP83815VNG	NSC	Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter)	获取价格
DP83816	NSC	DP83816 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (Ma	获取价格

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