Datasheet > DM9102AF

DM9102AF

更新时间： 2024-02-19 08:55:05

品牌	Logo	应用领域
其他 - ETC		外围集成电路控制器局域网以太网
页数	文件大小	规格书
77页	455K
描述
Single Chip Fast Ethernet NIC controller

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技术参数
数据手册

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DM9102AF 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.62
Is Samacsys：	N	Base Number Matches：	1

DM9102AF 数据手册

DM9102A

Single Chip Fast Ethernet NIC controller

General Description

The DM9102A is a fully integrated and cost-effective single

chip Fast Ethernet NIC controller. It is designed with the low

power and high performance process. It is a 3.3V device

with 5V tolerance then it supports 3.3V and 5V signaling.

Spec. Its auto-negotiation function will automatically

configure the DM9102A to take the maximum advantage of

its abilities. The DM9102A is also support IEEE 802.3x full-

duplex flow control.

The DM9102A provides direct interface to the PCI or the

CardBus. It supports bus master capability and fully

complies with PCI 2.2. In media side, The DM9102A

interfaces to the UTP3,4,5 in 10Base-T and UTP5 in

100Base-TX. It is fully compliance with the IEEE 802.3u

The DM9102A supports two types of power-management

mechanisms. The main mechanism is based upon the

OnNow architecture, which is required for PC99. The

alternative mechanism is based upon the remote Wake-On-

LAN mechanism.

Block Diagram

E E P R O M

Interface

Boot ROM /

MII Interface

D M A

PHYceiver

M A C

TX+/-

Parallel to

Serial

4B/5B

Encoding

NRZI to MLT3

NRZ to NRZI

Scrambler

FIFO

Machine

PCI

Interface

MII

RX+/-

R X

Machine

R X

FIFO

Parallel to

Serial

De-

Scrambler

4B/5B

Decoding

AEQ

MLT3 to NRZI

NRZI to NRZ

P M E #

W O L

Power

Management

Block

LED Driver

MII Management Control

MII Register

Autonegotiation

Final

Version: DM9102A-DS-F03

August 28, 2000

12 3 4 5 6 7...77

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