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DM7442A

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DM7442A 数据手册

August 1986

Revised February 2000

DM7442A

BCD to Decimal Decoder

General Description

Features

These BCD-to-decimal decoders consist of eight inverters

and ten, four-input NAND gates. The inverters are con-

nected in pairs to make BCD input data available for

decoding by the NAND gates. Full decoding of input logic

ensures that all outputs remain off for all invalid (10–15)

input conditions.

■ Diode clamped inputs

■ Also for application as 4-line-to-16-line decoders;

3-line-to-8-line decoders

■ All outputs are high for invalid input conditions

■ Typical power dissipation 140 mW

■ Typical propagation delay 17 ns

Ordering Code:

Order Number Package Number

Package Description

DM7442AN

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Connection Diagram

DS006516

www.fairchildsemi.com

12 3 4

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型号	品牌	获取价格	描述	数据表
DM7442AN	FAIRCHILD	获取价格	BCD to Decimal Decoder
DM7442AN	NSC	获取价格	BCD to Decimal Decoders
DM7442J	ROCHESTER	获取价格	Decimal Decoder/Driver
DM7442J/A+	ETC	获取价格	BCD-To-Decimal Decoder
DM7442N	ETC	获取价格	BCD-To-Decimal Decoder
DM7442N/A+	ETC	获取价格	BCD-To-Decimal Decoder
DM7442N/B+	ETC	获取价格	BCD-To-Decimal Decoder
DM7445	FAIRCHILD	获取价格	BCD to Decimal Decoders/Drivers
DM7445	NSC	获取价格	DM5445/DM7445 BCD to Decimal Decoders/Drivers
DM7445J	ETC	获取价格	Decoder/Driver