點晶科技股份有限公司
SILICON TOUCH TECHNOLOGY INC.
DM141
Pin Connection (Top view)
QFN32
SDIP28, SSOP28
VDD
SIN
CLK
LTH
EN
GND
G1
R1
1
2
3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
24 23 22 21 20 19 18 17
25
RRES
GRES
SOUT
RESERVED
GND
R8
R6
G7
16
15
14
13
12
11
10
9
G3
26
27
28
29
30
31
32
R2
4
5
R7
G2
6
Thermal Pad
GND
GND
G8
GND
R1
7
8
G8
G2
9
R7
R8
G1
R2
10
11
12
13
14
G7
GND
GND
EN
G3
R6
R3
G4
R4
G6
R5
G5
RESERVED
1
2
3
4
5
6
7
8
Pin Description
Pin No.
Pin No.
Pin NAME
FUNCTION
(QFN32)
(SDIP28, SSOP28)
5
6
1
2
VDD
SIN
Supply voltage terminal.
Input terminal of a data shift register. Data for R8 should be shifted in first, and then the data
for G8 followed.
7
8
3
4
CLK
LTH
Input terminal of a clock for shift register. Data is sampled at the rising edge of CLK.
Input terminal of data strobe. Data is latched when LTH is low. And data on shift register goes
through when LTH is high.
9
5
EN
Input terminal of output enable (active low), all outputs are off when EN is high.
Constant current output terminals (Bank G).
11, 14, 16, 19,
21, 24, 26, 29
7,9,11,13,
15,17,19,21
G1~8
12, 15, 17, 20,
22, 25, 27, 30
8,10,12,14,
16,18,20,22
R1~8
GND
Constant current output terminals (Bank R).
Ground terminals.
4, 10, 13, 18,
23, 28, 31
6,23,28
32
1
24
25
26
RESERVED Reserved pin for future.
SOUT
GRES
Output terminal of a data shift register.
2
Input terminal of an external resistor (Bank G). The current flows through the resistor from
GRES to ground will be the (Bank G) reference base current of output sink current.
3
27
RRES
Input terminal of an external resistor (Bank R).
8x2-Bit Constant Current LED Drivers
-2-
Version:A.012