DG201C

更新时间： 2024-01-24 17:34:10

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美信 - MAXIM		开关
页数	文件大小	规格书
12页	517K
描述
Quad SPST CMOS Analog Switches

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技术参数
数据手册

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DG201C 技术参数

生命周期：	Transferred	包装说明：	SOIC
Reach Compliance Code：	unknown	风险等级：	5.55
模拟集成电路 - 其他类型：	SPST	JESD-30 代码：	R-PDSO-G
信道数量：	4	功能数量：	1
最大通态电阻 (Ron)：	50 Ω	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
认证状态：	Not Qualified	最大供电电压 (Vsup)：	44 V
表面贴装：	YES	最长接通时间：	50 ns
端子形式：	GULL WING	端子位置：	DUAL
Base Number Matches：	1

DG201C 数据手册

Quad SPST CMOS Analog Switches

ELECTRICAL CHARACTERISTICS (DG20ꢁA)

(5+ = +1ꢀ5, 5- = -1ꢀ5, GND = 0, T = full ꢀꢃeartꢄng temꢃerature range, unless otherwise noted.) (For more information on TYP

values see Note 3.)

DG20ꢁAA

DG20ꢁAC, D, E

PARAMETER

SWITCH

SYMBVL

CVNDITIVNS

UNITS

MIN

TYP MAX MIN

TYP MAX

Analog Signal Range

-1ꢀ

1ꢀ

-1ꢀ

1ꢀ

ANALOG

Drain-Source ON Resistance

(Note ꢀ)

= ±105, 5 = 0.ꢁ5, I = 1mA

2ꢀ0

100

2ꢀ0

100

DS (ON)

S (OFF)

D (OFF)

5 = 1±5, 5 = -1±5

Source OFF Leakage Current

Drain OFF Leakage Current

= 2.±5

= 0.ꢁ5

5 = -1±5, 5 = 1±5

-100

-200

-1.0

-100

-200

-1.0

5 = 1±5, 5 = -1±5

100

200

100

200

µA

5 = -1±5, 5 = 1±5

Drain ON Leakage

Current (Note 6)

5 = -1±5

D (ON)

= 1±5

INPUT

= 2.±5

= 1ꢀ5

Input Current with Input

5oltage High

INH

1.0

Input Current with Input

5oltage Low

= 0

-1.0

INL

Nꢀte .: Electrical characteristics, such as ON-Resistance, will change when power supplies other than ±1ꢀ5, are used.

Nꢀte 6: I

is leakage from driver into “ON” switch.

D (ON)

Pin Description

NAME

QFN

FUNCTIVN

DIP/SV/TSSVP

1, 16, 9, ꢁ

1ꢀ, 1±, 7, 6

IN1–IN±

D1–D±

S1–S±

Input

2, 1ꢀ, 10, 7

16, 13, ꢁ, ꢀ

Analog Switch Drain Terminal

Analog Switch Source Terminal

Negative-Supply 5oltage Input

Ground

3, 1±, 11, 6

1, 12, 9, ±

ꢀ

GND

N.C.

No Connection

Positive-Supply 5oltage Input—Connected to Substrate

Switching Time Test Circuit

Switch output waveform shown for 5 = constant with

logic input waveform as shown. Note that 5 may be

+ve or -ve as per switching times test circuit. 5 is the

steady state output with switch on. Feedthrough via

gate capacitance may result in spikes at leading and

trailing edge of output waveform.

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1 2 3 456 7 8...12

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