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DG201HSDQ-T1-E3 PDF预览

DG201HSDQ-T1-E3

更新时间: 2024-11-26 06:53:03
品牌 Logo 应用领域
威世 - VISHAY 复用器开关复用器或开关信号电路光电二极管输出元件
页数 文件大小 规格书
9页 124K
描述
High-Speed Quad SPST CMOS Analog Switch

DG201HSDQ-T1-E3 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:0.89
模拟集成电路 - 其他类型:SPSTJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
湿度敏感等级:1标称负供电电压 (Vsup):-15 V
正常位置:NC信道数量:1
功能数量:4端子数量:16
标称断态隔离度:85 dB通态电阻匹配规范:0.75 Ω
最大通态电阻 (Ron):50 Ω最高工作温度:85 °C
最低工作温度:-40 °C输出:SEPARATE OUTPUT
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:+-15 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Multiplexer or Switches
标称供电电压 (Vsup):15 V表面贴装:YES
最长断开时间:50 ns最长接通时间:60 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

DG201HSDQ-T1-E3 数据手册

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DG201HS  
Vishay Siliconix  
High-Speed Quad SPST CMOS Analog Switch  
DESCRIPTION  
FEATURES  
Fast Switching-tON: 38 ns  
Low On-Resistance: 25 Ω  
Low Leakage: 100 pA  
The DG201HS is an improved monolithic device containing  
four independent analog switches. It is designed to provide  
high speed, low error switching of analog signals. Combining  
low on-resistance (25 Ω) with high speed (tON: 38 ns), the  
DG201HS is ideally suited for high speed data acquisition  
requirements.  
Pb-free  
Available  
RoHS*  
Low Charge Injection  
COMPLIANT  
TTL/CMOS Logic Compatible  
Single Supply Compatibility  
High Current Rating: - 30 mA  
To achieve high voltage ratings and superior switching  
performance, the DG201HS is built on a proprietary  
high-voltage silicon-gate process. An epitaxial layer  
prevents latchup.  
BENEFITS  
Faster Throughput  
Higher Accuracy  
Reduced Pedestal Error  
Upgrades Existing Designs  
Simple Interfacing  
Each switch conducts equally well in both directions when  
on, and blocks input voltages to the supply values, when off.  
Replaces HI201HS, ADG201HS  
Space Savings (TSSOP)  
APPLICATIONS  
Data Acquisition  
Hi-Rel Systems  
Sample-and-Hold Circuits  
Communication Systems  
Automatic Test Equipment  
Integrator Reset Circuits  
Choppers  
Gain Switching  
Avionics  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
LCC  
NC IN  
Dual-In-Line, SOIC and TSSOP  
D
1
IN  
1
D
2
2
Key  
1
IN  
IN  
2
1
1
1
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
3
2
1
20  
19  
D
S
D
2
4
5
6
7
8
18  
17  
16  
S
S
2
S
2
TRUTH TABLE  
V-  
NC  
V+  
V-  
V+  
Logic  
Switch  
NC  
NC  
0
1
ON  
OFF  
GND  
NC  
15  
14  
GND  
Logic "0" 0.8 V  
Logic "1" 2.4 V  
S
S
3
4
4
4
S
4
S
3
D
D
3
9
10  
IN  
11  
12  
13  
IN  
IN  
3
D
4
NC IN  
Top View  
D
3
4
3
Top View  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 70038  
S-71241–Rev. G, 25-Jun-07  
www.vishay.com  
1

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