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DAC80Z-CBI-V PDF预览

DAC80Z-CBI-V

更新时间： 2024-01-03 14:28:34
品牌 Logo 应用领域
BB 转换器数模转换器
页数 文件大小 规格书
9页 214K
描述
Monolithic 12-Bit DIGITAL-TO-ANALOG CONVERTERS

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DAC80Z-CBI-V 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
Reach Compliance Code：unknown风险等级：5.66
转换器类型：D/A CONVERTER输入位码：COMPLEMENTARY BINARY CODED DECIMAL
JESD-30 代码：R-XDIP-T24JESD-609代码：e0
最大线性误差 (EL)：0.024%位数：12
功能数量：1端子数量：24
最高工作温度：70 °C最低工作温度：
封装主体材料：CERAMIC封装代码：DIP
封装等效代码：DIP24,.6封装形状：RECTANGULAR
封装形式：IN-LINE电源：5,+-12/+-15 V
认证状态：Not Qualified子类别：Other Converters
表面贴装：NO技术：BIPOLAR
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUALBase Number Matches：1

DAC80Z-CBI-V 数据手册

 浏览型号DAC80Z-CBI-V的Datasheet PDF文件第3页浏览型号DAC80Z-CBI-V的Datasheet PDF文件第4页浏览型号DAC80Z-CBI-V的Datasheet PDF文件第5页浏览型号DAC80Z-CBI-V的Datasheet PDF文件第7页浏览型号DAC80Z-CBI-V的Datasheet PDF文件第8页浏览型号DAC80Z-CBI-V的Datasheet PDF文件第9页 
0.1  
0.01  
OPERATING INSTRUCTIONS  
POWER SUPPLY CONNECTIONS  
Connect power supply voltages as shown in Figure 3. For  
optimum performance and noise rejection, power supply  
decoupling capacitors should be added as shown. These  
capacitors (1µF tantalum) should be located close to the  
DAC80.  
–VCC  
+VCC  
0.001  
0.0001  
±12V OPERATION  
All DAC80 models can operate over the entire power supply  
range of ±11.4V to ±16.5V. Even with supply levels drop-  
ping to ±11.4V, the DAC80 can swing a full ±10V range,  
provided the load current is limited to ±2.5mA. With power  
supplies greater than ±12V, the DAC80 output can be loaded  
up to ±5mA. For output swing of ±5V or less, the output  
current is ±5mA, minimum, over the entire VCC range.  
1
10  
100  
1k  
10k  
100k  
Power Supply Ripple Frequency (Hz)  
FIGURE 2. Power Supply Rejection vs Power Supply Ripple.  
(pin 16) for specified operation. This reference may be used  
externally also, but external current drain is limited to  
2.5mA.  
No bleed resistor is needed from +VCC to pin 24, as was  
needed with prior hybrid Z versions of DAC80. Existing  
±12V applications that are being converted to the monolithic  
DAC80 must omit the resistor to pin 24 to insure proper  
operation.  
If a varying load is to be driven, an external buffer amplifier  
is recommended to drive the load in order to isolate bipolar  
offset from load variations. Gain and bipolar offset adjust-  
ments should be made under constant load conditions.  
EXTERNAL OFFSET AND GAIN ADJUSTMENT  
LOGIC INPUT COMPATIBILITY  
Offset and gain may be trimmed by installing external Offset  
and Gain potentiometers. Connect these potentiometers as  
shown in Figure 3 and adjust as described below. TCR of the  
potentiometers should be 100ppm/°C or less. The 3.9MΩ  
and 10MΩ resistors (20% carbon or better) should be lo-  
cated close to the DAC80 to prevent noise pickup. If it is not  
convenient to use these high value resistors, an equivalent  
“T” network, as shown in Figure 4, may be substituted.  
DAC80 digital inputs are TTL, LSTTL and 4000B,  
54/74HC CMOS compatible. The input switching threshold  
remains at the TTL threshold over the entire supply range.  
Logic “0” input current over temperature is low enough to  
permit driving DAC80 directly from outputs of 4000B and  
54/74C CMOS devices.  
Current Output Models  
Voltage Output Models  
+VCC  
10kΩ  
to  
100kΩ  
+VCC  
1
2
24  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Reference  
Control  
Circuit  
10MΩ  
10MΩ  
Reference  
Control  
Circuit  
10kΩ  
to  
100kΩ  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
3
0.01µF  
0.01µF  
3
–VCC  
–VCC  
4
4
3.9MΩ  
10kΩ  
to  
100kΩ  
10kΩ  
to  
100kΩ  
12-Bit  
Resistor  
Ladder  
Network  
and  
12-Bit  
Resistor  
Ladder  
Network  
and  
5
5
5kΩ  
2kΩ  
6
3kΩ  
5kΩ  
6
5kΩ  
6.3kΩ  
7
7
+VCC  
+VCC  
Current  
Switches  
Current  
Switches  
1µF  
1µF  
1µF  
8
8
6.3kΩ  
9
9
3.9MΩ  
10  
11  
12  
10  
11  
12  
–VCC  
–VCC  
1µF  
FIGURE 3. Power Supply and External Adjustment Connection Diagrams.  
®
6
DAC80/80P  
1...3456789

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