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DAC703KH-BI PDF预览

DAC703KH-BI

更新时间: 2024-02-10 03:13:38
品牌 Logo 应用领域
BB 转换器数模转换器
页数 文件大小 规格书
12页 302K
描述
Monolithic 16-Bit DIGITAL-TO-ANALOG CONVERTERS

DAC703KH-BI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.62
转换器类型:D/A CONVERTER输入位码:COMPLEMENTARY OFFSET BINARY
JESD-30 代码:S-XQCC-N28JESD-609代码:e0
最大线性误差 (EL):0.006%位数:16
功能数量:1端子数量:28
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC封装代码:QCCN
封装等效代码:LCC28,.45SQ封装形状:SQUARE
封装形式:CHIP CARRIER电源:5,+-15 V
认证状态:Not Qualified最大稳定时间:8 µs
子类别:Other Converters最大压摆率:68 mA
表面贴装:YES技术:HYBRID
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUADBase Number Matches:1

DAC703KH-BI 数据手册

 浏览型号DAC703KH-BI的Datasheet PDF文件第4页浏览型号DAC703KH-BI的Datasheet PDF文件第5页浏览型号DAC703KH-BI的Datasheet PDF文件第6页浏览型号DAC703KH-BI的Datasheet PDF文件第8页浏览型号DAC703KH-BI的Datasheet PDF文件第9页浏览型号DAC703KH-BI的Datasheet PDF文件第10页 
POWER SUPPLY SENSITIVITY  
less. The 3.9Mand 270kresistors (±20% carbon or  
better) should be located close to the D/A converter to  
prevent noise pickup. If it is not convenient to use these  
high-value resistors, an equivalent “T” network, as shown in  
Figure 3, may be substituted in place of the 3.9Mpart. A  
0.001µF to 0.01µF ceramic capacitor should be connected  
from Gain Adjust to Common to prevent noise pickup. Refer  
to Figures 4 and 5 for the relationship of zero and gain  
adjustments to unipolar and bipolar D/A converters.  
Power supply sensitivity is a measure of the effect of a  
change in a power supply voltage on the D/A converter  
output. It is defined as a percent of FSR change in the output  
per percent of change in either the positive supply (+VCC),  
negative supply (–VCC) or logic supply (VDD) about the  
nominal power supply voltages (see Figure 2).  
It is specified for DC or low frequency changes. The typical  
performance curve in Figure 2 shows the effect of high  
frequency changes in power supply voltages.  
0.030  
0.025  
0.020  
3.9M  
180kΩ  
180kΩ  
10kΩ  
FIGURE 3. Equivalent Resistances.  
0.015  
–15V Supply  
0.01  
+5V  
+15V  
Supply  
Supply  
+ Full  
Scale  
0.005  
0
Gain Adjust  
Rotates  
the Line  
1LSB  
1
10  
100  
1k  
10k  
100k  
Range  
of Gain  
Adjust  
Power Supply Ripple Frequency (Hz)  
FIGURE 2. Power Supply Rejection vs Power Supply Ripple  
Frequency.  
Input =  
FFFFH  
Range of  
Zero Adjust  
Input =  
0000 H  
REFERENCE SUPPLY  
Zero Adjust  
Translates  
the Line  
All models have an internal low-noise +6.3V reference  
voltage derived from an on-chip buried zener diode. This  
reference voltage, available to the user, has a tolerance of  
±5% (KH models) and ±1% (BH models). A minimum of  
1.5mA is available for external loads. Since the output  
impedance of the reference output is typically 1W, the  
external load should remain constant.  
Digital Input  
FIGURE 4. Relationship of Zero and Gain Adjustments for  
Unipolar D/A Converters, DAC701.  
1LSB  
If a varying load is to be driven by the reference supply, an  
external buffer amplifier is recommended to drive the load  
in order to isolate the bipolar offset (connected internally to  
the reference) from load variations.  
Range  
+ Full  
of Gain  
Scale  
Adjust  
Offset  
Adjust  
Translates  
the Line  
Gain  
Adjust  
Rotates  
the Line  
Input =  
FFFFH  
OPERATING INSTRUCTIONS  
Range  
and  
POWER SUPPLY CONNECTIONS  
Offset  
Adjust  
For optimum performance and noise rejection, power sup-  
ply decoupling capacitors should be added as shown in the  
Connection Diagram. 1µF tantalum capacitors should be  
located close to the D/A converter.  
Input =  
0000 H  
MSB on All  
Others Off 7FFFH  
EXTERNAL ZERO AND GAIN ADJUSTMENT  
– Full  
Scale  
Digital Input  
Zero and gain may be trimmed by installing external zero  
and gain potentiometers. Connect these potentiometers as  
shown in the Connection Diagram and adjust as described  
below. TCR of the potentiometers should be 100ppm/°C or  
FIGURE 5. Relationship of Zero and Gain Adjustments for  
Bipolar D/A Converters, DAC702 and DAC703.  
®
7
DAC701, 702, 703  

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