DAC0830, DAC0832
www.ti.com
SNAS534B –MAY 1999–REVISED MARCH 2013
Operating Conditions
Temperature Range
TMIN≤TA≤TMAX
Part numbers with “LCN” suffix
0°C to +70°C
0°C to +70°C
Part numbers with “LCWM” suffix
Part numbers with “LCV” suffix
Part numbers with “LCJ” suffix
Part numbers with “LJ” suffix
Voltage at Any Digital Input
0°C to +70°C
−40°C to +85°C
−55°C to +125°C
VCC to GND
Electrical Characteristics
VREF=10.000 VDC unless otherwise noted. Boldface limits apply over temperature, TMIN≤TA≤TMAX.
(1) For all other limits
TA=25°C.
VCC = 5 VDC ±5%
VCC = 12 VDC ±5%
to 15 VDC ±5%
VCC = 4.75 VDC
VCC = 15.75 VDC
See
Note
Limit
Parameter
Conditions
Units(2)
Tested
Design
Limit(5)
Typ(3)
Limit(4)
CONVERTER CHARACTERISTICS
Resolution
8
8
8
bits
Linearity Error Max
Zero and full scale adjusted
−10V≤VREF≤+10V
See(6)
and
(2)
DAC0830LJ & LCJ
DAC0832LJ & LCJ
0.05
0.2
0.05
0.2
% FSR
% FSR
% FSR
DAC0830LCN, LCWM &
LCV
0.05
0.05
DAC0831LCN
0.1
0.2
0.1
0.2
% FSR
% FSR
DAC0832LCN, LCWM &
LCV
Differential Nonlinearity
Max
Zero and full scale adjusted
−10V≤VREF≤+10V
See(6)
and
(2)
DAC0830LJ & LCJ
DAC0832LJ & LCJ
0.1
0.4
0.1
0.1
0.4
0.1
% FSR
% FSR
% FSR
DAC0830LCN, LCWM &
LCV
DAC0831LCN
0.2
0.4
0.2
0.4
% FSR
% FSR
DAC0832LCN, LCWM &
LCV
Monotonicity
−10V≤VREF
LJ & LCJ
See(6)
See(7)
8
8
8
8
bits
bits
≤+10V
LCN, LCWM & LCV
Gain Error Max
Using Internal Rfb
−10V≤VREF≤+10V
±0.2
±1
±1
% FS
%
FS/°C
Gain Error Tempco Max
Using internal Rfb
0.0002
0.0006
(1) Boldface tested limits apply to the LJ and LCJ suffix parts only.
(2) The unit “FSR” stands for “Full Scale Range.” “Linearity Error” and “Power Supply Rejection” specs are based on this unit to eliminate
dependence on a particular VREF value and to indicate the true performance of the part. The “Linearity Error” specification of the
DAC0830 is “0.05% of FSR (MAX)”. This ensures that after performing a zero and full scale adjustment (see sections Zero Adjustment
and Full-Scale Adjustment), the plot of the 256 analog voltage outputs will each be within 0.05%×VREF of a straight line which passes
through zero and full scale.
(3) Typicals are at 25°C and represent most likely parametric norm.
(4) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level).
(5) Ensured, but not 100% production tested. These limits are not used to calculate outgoing quality levels.
(6) For current switching applications, both IOUT1 and IOUT2 must go to ground or the “Virtual Ground” of an operational amplifier. The
linearity error is degraded by approximately VOS ÷ VREF. For example, if VREF = 10V then a 1 mV offset, VOS, on IOUT1 or IOUT2 will
introduce an additional 0.01% linearity error.
(7) Specified at VREF=±10 VDC and VREF=±1 VDC
.
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