Datasheet > 转换器 > 数模转换器> DAC0832LCWMX/NOPB

DAC0832LCWMX/NOPB

更新时间： 2024-01-30 19:58:21

品牌	Logo	应用领域
德州仪器 - TI		转换器数模转换器模数转换器光电二极管
页数	文件大小	规格书
29页	1597K
描述
DAC0830/DAC0832 8-Bit Î¼P Compatible, Double-Buffered D to A Converters

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DAC0832LCWMX/NOPB 技术参数

生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	,	针数：	20
Reach Compliance Code：	unknown	风险等级：	5.73
转换器类型：	D/A CONVERTER	位数：	8
Base Number Matches：	1

DAC0832LCWMX/NOPB 数据手册

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DAC0830, DAC0832

SNAS534B –MAY 1999–REVISED MARCH 2013

www.ti.com

Connection Diagrams

(Top Views)

Figure 1. PDIP, CDIP, and SOIC Packages

Figure 2. PLCC Package

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings^(1)(2)(3)

Supply Voltage (V_CC

)

17 V_DC

V_CCto GND

±25V

Voltage at Any Digital Input

Voltage at V_REFInput

Storage Temperature Range

−65°C to +150°C

Package Dissipation at

T_A=25°C⁽⁴⁾

500 mW

DC Voltage Applied to

−100 mV to V_CC

(5)

I_OUT1or I_OUT2

ESD Susceptability⁽⁵⁾⁽⁶⁾

800V

260°C

300°C

215°C

220°C

Lead

PDIP Package (plastic)

Temperature

(Soldering, 10

sec.)

CDIP Package (ceramic)

SOIC Package

Vapor Phase (60 sec.)

Infrared (15 sec.)

(1) All voltages are measured with respect to GND, unless otherwise specified.

(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not

apply when operating the device beyond its specified operating conditions.

(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by T_JMAX, θ_JA, and the ambient temperature,

T_A. The maximum allowable power dissipation at any temperature is P_D= (T_JMAX− T_A)/θ_JAor the number given in the Absolute

Maximum Ratings, whichever is lower. For this device, T_JMAX= 125°C (plastic) or 150°C (ceramic), and the typical junction-to-ambient

thermal resistance of the J package when board mounted is 80°C/W. For the NFH package, this number increases to 100°C/W and for

the FN package this number is 120°C/W.

(5) For current switching applications, both I_OUT1and I_OUT2must go to ground or the “Virtual Ground” of an operational amplifier. The

linearity error is degraded by approximately V_OS÷ V_REF. For example, if V_REF= 10V then a 1 mV offset, V_OS, on I_OUT1or I_OUT2will

introduce an additional 0.01% linearity error.

(6) Human body model, 100 pF discharged through a 1.5 kΩ resistor.

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