Datasheet > CYS25G02K100V1-MGC

CYS25G02K100V1-MGC

更新时间： 2024-02-05 16:17:53

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
59页	736K
描述
ATM Network Interface, 1-Func, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

CYS25G02K100V1-MGC 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	35 X 35 MM, 2.33 MM HEIGHT, BGA-456	针数：	456
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.92	应用程序：	SONET;SDH
JESD-30 代码：	S-PBGA-B456	JESD-609代码：	e0
长度：	35 mm	功能数量：	1
端子数量：	456	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	座面最大高度：	2.46 mm
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	ATM/SONET/SDH NETWORK INTERFACE	温度等级：	COMMERCIAL
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	30	宽度：	35 mm
Base Number Matches：	1

CYS25G02K100V1-MGC 数据手册

浏览型号CYS25G02K100V1-MGC的Datasheet PDF文件第2页

浏览型号CYS25G02K100V1-MGC的Datasheet PDF文件第3页

浏览型号CYS25G02K100V1-MGC的Datasheet PDF文件第4页

浏览型号CYS25G02K100V1-MGC的Datasheet PDF文件第5页

浏览型号CYS25G02K100V1-MGC的Datasheet PDF文件第6页

浏览型号CYS25G02K100V1-MGC的Datasheet PDF文件第7页

Programmable Serial Interface™

(High Speed Devices)

PRELIMINARY

Programmable Bandwidth

• Up to two serial channels available to allow:

— High-Bandwidth

Features

• 200 Mbps–1.5 Gbps, 2.5 Gbps serial signaling rate

• Flexible parallel-to-serial conversion in transmit path

• Flexible serial-to-parallel conversion in receive path

• Multiple selectable loopback/loop-through modes

• 100K to 200K usable gates of CPLD logic

— Redundancy

• Supported standards:

— InfiniBand™

— SONET OC-48

• 240K to 480 Kb of integrated memory

Frequency Agile PSI Features^[1]

— 192K to 384 Kb of synchronous or asynchronous

SRAM

• 200 Mbps–1.5 Gbps serial signaling rate per channel

• Up to eight serial channels available to allow:

— Frequency Agile

— 48K to 96 Kb of true Dual-Port or FIFO RAM

• Internal transmit and receive PLLs

• Logic dedicated Spread Aware PLL

— Redundancy

• Transmit FIFO for flexible variable phase clocking

• Differential CML serial input with internal termination

and DC-restoration

• Differential CML serial output with source matched im-

pedance of 50Ω

• Selectable input and output clocking options

• MultiFrame™ receive framer provides alignment to:

— Bit, byte, half-word, word, multi-word

— COMMA or Full K28.5 detect

• 160–240 user programmable I/Os

• Any Volt I/O interface

— Single or Multi-byte framer for byte alignment

— Low-latency option

— Programmable as 1.8V, 2.5V, 3.3V

• Multiple I/O standards

• Skew alignment support for multiple bytes of offset

• Selectable parity check/generate

• Serial Built-In-Self-Test (BIST) for at-speed link testing

• Per-channel Link Quality Indicator

— Analog signal detect

— LVCMOS, LVTTL, 3.3V PCI, SSTL2(I-II), SSTL3(I-II),

HSTL(I-IV), and GTL+

• Direct interface to standard fiber-optic modules

• Designed to drive:

— Digital signal detect

— Frequency range detect

• Supported standards:

— Fibre Channel

— Gigabit Ethernet

— ESCON

— fiberoptic modules

— copper cables

— circuit board traces

— backplane links

— box-to-box links

— chip-to-chip communication

• Extremely flexible clocking options

— Four global clocks

— DVB

— SMPTE

Development Software

— Up to 192 additional product term clocks

— Clock polarity at every register

• Warp®

• Carry chain logic for fast and efficient arithmetic

— IEEE 1076/1164 VHDL or IEEE 1364 Verilog context

operations

sensitive editing

• Fully PCI compliant (Rev. 2.2)

• JTAG programming interface with boundary scan sup-

port

— Active-HDL FSM graphical finite state machine

editor

— Active-HDL SIM post-synthesis timing simulator

— Architecture Explorer for detailed design analysis

— Static Timing Analyzer for critical path analysis

• High-Speed (HS) or Frequency Agile (FA) Programma-

ble Serial Interface (PSI) versions available

High-Speed PSI Features

— Available on Windows 95™, Windows 98™ & Win-

dows NT™ for $99

• 2.5 Gbps/channel serial signaling rate

• Full Bellcore and ITU jitter compliance

• Power-saving mode

Note:

— Supports all Cypress programmable logic products

1. For detailed data sheet see “Frequency Agile PSI data sheet.”

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-02021 Rev *A

Revised July 6, 2001

12 3 4 5 6 7...59

下载PDF

与CYS25G02K100V1-MGC相关器件

型号	品牌	描述	获取价格	数据表
CYS2A11A-20.000	CRYSTEKMICROWAVE	Quartz Crystal Low Profile HC49S Leaded Crystal	获取价格
CYS2A11A-FREQ	CRYSTEKMICROWAVE	Quartz Crystal Low Profile HC49S Leaded Crystal	获取价格
CYS2A11AS-20.000	CRYSTEKMICROWAVE	Quartz Crystal Low Profile HC49S Leaded Crystal	获取价格
CYS2A11AS-FREQ	CRYSTEKMICROWAVE	Quartz Crystal Low Profile HC49S Leaded Crystal	获取价格
CYS2A11B-20.000	CRYSTEKMICROWAVE	Quartz Crystal Low Profile HC49S Leaded Crystal	获取价格
CYS2A11B-FREQ	CRYSTEKMICROWAVE	Quartz Crystal Low Profile HC49S Leaded Crystal	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

CYS25G02K100V1-MGC

CYS25G02K100V1-MGC 技术参数

CYS25G02K100V1-MGC 数据手册

与CYS25G02K100V1-MGC相关器件

与CYS25G02K100V1-MGC相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CYS25G02K100V1-MGC

CYS25G02K100V1-MGC 技术参数

CYS25G02K100V1-MGC 数据手册

与CYS25G02K100V1-MGC相关器件

与CYS25G02K100V1-MGC相关文章

您还可以找

您在本页遇到什么问题？