CY8CLED16P01
Powerline Communication Solution
Features
■ Powerline Communication Solution
❐ Integrated Powerline Modem PHY
❐ Frequency Shift Keying Modulation
❐ 16 Digital PSoC Blocks provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
❐ Configurable baud rates up to 2400 bps
❐ Powerline Optimized Network Protocol
❐ Integrates Data Link, Transport, and Network Layers
❐ Supports Bidirectional Half Duplex Communication
❐ 8-bit CRC Error Detection to Minimize Data Loss
❐ I2C enabled Powerline Application Layer
❐ Supports I2C Frequencies of 50, 100, and 400 kHz
• Up to Four Full Duplex UARTs
• Multiple SPITM Masters or Slaves
• Connectable to all GPIO Pins
❐ Complex Peripherals by Combining Blocks
■ Flexible On-Chip Memory
❐ 32 KB Flash Program Storage 50,000 Erase or Write Cycles
❐ 2 KB SRAM Data Storage
❐ Reference Designs for 110V/240V AC and 12V/24V AC/DC
Powerlines
❐ EEPROM Emulation in Flash
■ Programmable Pin Configurations
❐ 25 mA Sink, 10 mA Source on all GPIOs
❐ Reference Designs comply with CENELEC EN
50065-1:2001 and FCC Part 15
■ HB LED Controller
❐ Configurable Dimmers Support up to 16 Independent LED
Channels
❐ Pull Up, Pull Down, High Z, Strong, or Open-drain Drive
Modes on all GPIOs
❐ Up to 12 Analog Inputs on GPIO
❐ Configurable Interrupt on all GPIO
❐ 8 to 32 Bits of Resolution per Channel
❐ PrISM™ Modulation technology to reduce radiated EMI and
■ Additional System Resources
Low Frequency Blinking
❐ I2C Slave, Master, and Multi-Master to 400 kHz
❐ Watchdog and Sleep Timers
❐ Additional communication interfaces for lighting control such
as DALI, DMX512 etc.
❐ User-Configurable Low Voltage Detection
❐ Integrated Supervisory Circuit
❐ On-Chip Precision Voltage Reference
■ Powerful Harvard Architecture Processor
❐ M8C Processor Speeds to 24 MHz
❐ Two 8x8 Multiply, 32-Bit Accumulate
■ Programmable System Resources (PSoC® Blocks)
❐ 12 Rail-to-Rail Analog PSoC Blocks provide:
• Up to 14-Bit ADCs
■ Complete Development Tools
❐ Free Development Software (PSoC Designer™)
❐ Full Featured In-Circuit Emulator (ICE) and Programmer
❐ Full Speed Emulation
❐ Complex Breakpoint Structure
❐ 128 KB Trace Memory
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
❐ Complex Events
❐ C Compilers, Assembler, and Link
Logic Block Diagram
Powerline Communication Solution
Embedded Application
Programmable
Modulation
System Resources
Digital and Analog
Peripherals
Technology
PrISM, PWM etc.
Powerline
Network Protocol
Additional
Communication
Additional System
Physical Layer
FSK Modem
Resources
MAC, Decimator, I2C,
SPI, UART etc.
Interface
DALI, DMX512
HB LED
Controller
PLC Core
PSoC Core
Powerline Transceiver Packet
AC/DC Powerline Coupling Circuit
(110V/240V AC, 12V/24V AC/DC etc.)
Powerline
Cypress Semiconductor Corporation
Document Number: 001-49263 Rev. *J
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised June 17, 2011
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