Datasheet > CY8C5588AXI-022

CY8C5588AXI-022

更新时间： 2024-02-15 14:07:45

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟
页数	文件大小	规格书
102页	2766K
描述
Multifunction Peripheral, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, TQFP-100

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CY8C5588AXI-022 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LFQFP, QFP100,.63SQ,20	针数：	100
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.84	地址总线宽度：
边界扫描：	YES	总线兼容性：	USB
最大时钟频率：	80 MHz	外部数据总线宽度：
JESD-30 代码：	S-PQFP-G100	JESD-609代码：	e4
长度：	14 mm	湿度敏感等级：	3
I/O 线路数量：	72	端子数量：	100
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装等效代码：	QFP100,.63SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	1.8/5 V	认证状态：	Not Qualified
RAM（字数）：	32768	ROM大小（位）：	262144 Bits
座面最大高度：	1.6 mm	子类别：	Other Microprocessor ICs
最大供电电压：	5.5 V	最小供电电压：	1.71 V
标称供电电压：	1.8 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	20	紫外线可擦：	N
宽度：	14 mm	Base Number Matches：	1

CY8C5588AXI-022 数据手册

PRELIMINARY

PSoC^®5: CY8C55 Family Datasheet

Figure 1-1 illustrates the major components of the CY8C55

family. They are:

subsystem is a fast, accurate, configurable delta-sigma ADC

with these features:

■ ARM Cortex-M3 CPU subsystem

■ Nonvolatile subsystem

■ Programming, debug, and test subsystem

■ Inputs and outputs

■ Less than 100-µV offset

■ A gain error of 0.2%

■ Integral non linearity (INL) less than ±2 LSB

■ Differential non linearity (DNL) less than ±1 LSB

■ SNR better than 89 dB in 16-bit mode

■ Clocking

■ Power

This converter addresses a wide variety of precision analog

applications including some of the most demanding sensors.

■ Digital subsystem

The CY8C55 family also offers up to two SAR ADCs. Featuring

12-bit conversions at up to 1 M samples per second, they also

offer low nonlinearity and offset errors and SNR better than

70 dB. They are well-suited for a variety of higher speed analog

applications.

■ Analog subsystem

PSoC’s digital subsystem provides half of its unique

configurability. It connects a digital signal from any peripheral to

any pin through the digital system interconnect (DSI). It also

provides functional flexibility through an array of small, fast, low

power UDBs. PSoC Creator provides a library of pre-built and

tested standard digital peripherals (UART, SPI, LIN, PRS, CRC,

timer, counter, PWM, AND, OR, and so on) that are mapped to

the UDB array. The designer can also easily create a digital

circuit using boolean primitives by means of graphical design

entry. Each UDB contains programmable array logic

(PAL)/programmable logic device (PLD) functionality, together

with a small state machine engine to support a wide variety of

peripherals.

The output of any of the ADCs can optionally feed the

programmable DFB via DMA without CPU intervention. The

designer can configure the DFB to perform IIR and FIR digital

filters and several user defined custom functions. The DFB can

implement filters with up to 64 taps. It can perform a 48-bit

multiply-accumulate (MAC) operation in one clock cycle.

Four high-speed voltage or current DACs support 8-bit output

signals at an update rate of up to 8 Msps. They can be routed

out of any GPIO pin. You can create higher resolution voltage

DAC outputs using the UDB array. This can be used to create a

pulse width modulated (PWM) DAC of up to 10 bits, at up to

48 kHz. The digital DACs in each UDB support PWM, PRS, or

delta-sigma algorithms with programmable widths.

In addition to the flexibility of the UDB array, PSoC also provides

configurable digital blocks targeted at specific functions. For the

CY8C55 family, these blocks can include four 16-bit timers,

counters, and PWM blocks; I²C slave, master, and multimaster;

Full-Speed USB; and Full CAN 2.0b.

In addition to the ADCs, DACs, and DFB, the analog subsystem

provides multiple:

For more details on the peripherals see the “Example

Peripherals” section on page 31 of this datasheet. For

information on UDBs, DSI, and other digital blocks, see the

“Digital Subsystem” section on page 31 of this datasheet.

■ Comparators

■ Uncommitted opamps

PSoC’s analog subsystem is the second half of its unique

configurability. All analog performance is based on a highly

accurate absolute voltage reference with less than 0.1% error

over temperature and voltage. The configurable analog

subsystem includes:

■ Configurable switched capacitor/continuous time (SC/CT)

blocks. These support:

❐ Transimpedance amplifiers

❐ Programmable gain amplifiers

❐ Mixers

■ Analog muxes

■ Comparators

■ Analog mixers

■ Voltage references

■ ADCs

❐ Other similar analog components

See the “Analog Subsystem” section on page 42 of this

datasheet for more details.

PSoC’s CPU subsystem is built around a 32-bit three-stage

pipelined ARM Cortex-M3 processor running at up to 80 MHz.

The Cortex-M3 includes a tightly integrated nested vectored

interrupt controller (NVIC) and various debug and trace modules.

The overall CPU subsystem includes a DMA controller, flash

cache, and RAM. The NVIC provides low latency, nested

interrupts, and tail-chaining of interrupts and other features to

increase the efficiency of interrupt handling. The DMA controller

enables peripherals to exchange data without CPU involvement.

This allows the CPU to run slower (saving power) or use those

CPU cycles to improve the performance of firmware algorithms.

The flash cache also reduces system power consumption by

allowing less frequent flash access.

■ DACs

■ Digital filter block (DFB)

All GPIO pins can route analog signals into and out of the device

using the internal analog bus. This allows the device to interface

up to 62 discrete analog signals. One of the ADCs in the analog

Document Number: 001-44094 Rev. *J

Page 4 of 102

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1 2 345 6 7...102

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与CY8C5588AXI-022相关器件

型号	品牌	描述	获取价格	数据表
CY8C5588AXI-060	CYPRESS	Multifunction Peripheral, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-02	获取价格
CY8C5588AXI-060ES0	CYPRESS	Multifunction Peripheral, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-02	获取价格
CY8C5588LTI-0114	CYPRESS	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM PITCH, ROHS COMPLIANT, MO-220, QFN-68	获取价格
CY8C5588LTI-052	CYPRESS	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLIANT, MO-220, QFN-68	获取价格
CY8C5588LTI-114	CYPRESS	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLAINT, MO-220, QFN-68	获取价格
CY8C5588LTI-114ES0	CYPRESS	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLAINT, MO-220, QFN-68	获取价格

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