Datasheet > CY8C5588LTI-0114

CY8C5588LTI-0114

更新时间： 2024-11-11 14:21:15

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟
页数	文件大小	规格书
92页	3026K
描述
Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM PITCH, ROHS COMPLIANT, MO-220, QFN-68

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CY8C5588LTI-0114 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	68
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.84	Is Samacsys：	N
地址总线宽度：		边界扫描：	YES
最大时钟频率：	80 MHz	外部数据总线宽度：
JESD-30 代码：	S-XQCC-N68	JESD-609代码：	e4
长度：	8 mm	湿度敏感等级：	3
I/O 线路数量：	48	端子数量：	68
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
RAM（字数）：	64000	座面最大高度：	1 mm
最大供电电压：	5.5 V	最小供电电压：	1.71 V
标称供电电压：	1.8 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	NICKEL PALLADIUM GOLD	端子形式：	NO LEAD
端子节距：	0.4 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	20	宽度：	8 mm
Base Number Matches：	1

CY8C5588LTI-0114 数据手册

PRELIMINARY

PSoC^®5: CY8C55 Family Data Sheet

Programmable System-on-Chip (PSoC^®)

General Description

With its unique array of configurable blocks, PSoC^®5 is a true system level solution providing MCU, memory, analog, and digital

peripheral functions in a single chip. The CY8C55 family offers a modern method of signal acquisition, signal processing, and control

with high accuracy, high bandwidth, and high flexibility. Analog capability spans the range from thermocouples (near DC voltages) to

ultrasonic signals. The CY8C55 family can handle dozens of data acquisition channels and analog inputs on every GPIO pin. The

CY8C55 family is also a high performance configurable digital system with some part numbers including interfaces such as USB,

multi-master I²C, and CAN. In addition to communication interfaces, the CY8C55 family has an easy to configure logic array, flexible

routing to all I/O pins, and a high performance 32-bit ARM^®Cortex™-M3 microprocessor core. Designers can easily create system

level designs using a rich library of prebuilt components and boolean primitives using PSoC^®Creator™, a hierarchical schematic

design entry tool. The CY8C55 family provides unparalleled opportunities for analog and digital bill of materials integration while easily

accommodating last minute design changes through simple firmware updates.

• LIN Bus 2.0

• Quadrature decoder

Analog peripherals (1.71V ≤ Vdda ≤ 5.5V)

1.024V±0.1% internal voltage reference across -40°C to

+85°C (14 ppm/°C)

Configurable Delta-Sigma ADC with 12 to 20-bit resolution

• Sample rates up to 192 ksps

• Programmable gain stage: x0.25 to x16

• 12-bit mode, 192 ksps, 70 dB SNR, 1.5 bit INL/DNL

• 16-bit mode, 48 ksps, 90 dB SNR, 1 bit INL/DNL

SAR ADC, each 12-bit at 1 Msps^[1]

Features

32-bit ARM Cortex-M3 CPU core

DC to 80 MHz operation

Flash program memory, 256 KB, 100,000 write cycles, 20

year retention, multiple security features

64 KB SRAM memory

2 KB EEPROM memory, 1 million cycles, 20 years retention

24 channel DMA with multilayer AHB bus access

• Programmable chained descriptors and priorities

• High bandwidth 32-bit transfer support

80 MHz, 24-bit fixed point digital filter block (DFB) to

Low voltage, ultra low power

implement FIR and IIR filters^[1]

Wide operating voltage range: 0.5V to 5.5V

Four 8-bit 8 Msps IDACs or 1 Msps VDACs

Four comparators with 75 ns response time

Four uncommitted opamps with 25 mA drive capability

Four configurable multifunction analog blocks. Example con-

figurations are PGA, TIA. Mixer and Sample and hold

Highefficiencyboostregulatorfrom0.5Vinputto1.8Vto5.0V

output

2 mA at 6 MHz

Low power modes including:

• 300 nA hibernate mode with RAM retention and LVD

• 2 µA sleep mode with real time clock and low voltage reset

Programming, debug, and trace

JTAG(4wire), SerialWireDebug(SWD)(2wire), SingleWire

Viewer (SWV), and TRACEPORT interfaces

Cortex-M3 Flash Patch and Breakpoint (FPB) block

Cortex-M3 Embedded Trace Macrocell™ (ETM™) gener-

ates an instruction trace stream.

Cortex-M3 Data Watchpoint and Trace (DWT) generates

data trace information

Versatile I/O system

28 to 72 I/O (62 GPIO, 8 SIO, 2 USBIO^[1]

)

Any GPIO to any digital or analog peripheral routability

LCD direct drive from any GPIO, up to 46x16 segments^[1]

1.2V to 5.5V I/O interface voltages, up to 4 domains

Maskable, independent IRQ on any pin or port

Schmitt trigger TTL inputs

Cortex-M3 Instrumentation Trace Macrocell (ITM) can be

used for printf-style debugging

All GPIO configurable as open drain high/low, pull up/down,

High-Z, or strong output

DWT, ETM, andITMblockscommunicatewithoff-chipdebug

and trace systems via the SWV or TRACEPORT

Configurable GPIO pin state at power on reset (POR)

25 mA sink on SIO

Bootloader programming supportable through I²C, SPI,

UART, USB, and other interfaces

Digital peripherals

Precision, programmable clocking

16 to 24 programmable PLD based Universal Digital Blocks

Full CAN 2.0b 16 RX, 8 TX buffers^[1]

1 to 72 MHz internal ±1% oscillator (over full temperature and

voltage range) with PLL

Full-Speed (FS) USB 2.0 12 Mbps using internal oscillator^[1]

Four 16-bit configurable timer, counter, and PWM blocks

Library of standard peripherals

4 to 33 MHz crystal oscillator for crystal PPM accuracy

Internal PLL clock generation up to 80 MHz

32.768 kHz watch crystal oscillator

• 8, 16, 24, and 32-bit timers, counters, and PWMs

• SPI, UART, I²C

Low power internal oscillator at 1 kHz, 100 kHz

• Many others available in catalog

Library of advanced peripherals

• Cyclic Redundancy Check (CRC)

• Pseudo Random Sequence (PRS) generator

Temperature and packaging

-40°C to +85°C degrees industrial temperature

48-pin SSOP, 68-pin QFN, and 100-pin TQFP package

options

Note

1. This feature on select devices only. See Ordering Information on page 87 for details.

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

CA 95134-1709

•

408-943-2600

Document Number: 001-44094 Rev. *C

Revised September 09, 2009

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与CY8C5588LTI-0114相关器件

型号	品牌	获取价格	描述	数据表
CY8C5588LTI-052	CYPRESS	获取价格	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLIANT, MO-220, QFN-68
CY8C5588LTI-114	CYPRESS	获取价格	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLAINT, MO-220, QFN-68
CY8C5588LTI-114ES0	CYPRESS	获取价格	Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLAINT, MO-220, QFN-68
CY8C5588PVI-065	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO48, 0.300 INCH, SSOP-48
CY8C5588PVI-067	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO48, 0.300 INCH, SSOP-48
CY8C5588PVI-115	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO48, 0.300 INCH, ROHS COMPLAINT, SSOP-48
CY8C5588PVI-115ES0	CYPRESS	获取价格	Multifunction Peripheral, CMOS, PDSO48, 0.300 INCH, ROHS COMPLAINT, SSOP-48
CY8C5666AXI-LP001	CYPRESS	获取价格	Programmable System-on-Chip (PSoCÂ®)
CY8C5666AXI-LP001	INFINEON	获取价格	CY8C56LPxxx
CY8C5666AXI-LP004	CYPRESS	获取价格	Programmable System-on-Chip (PSoCÂ®)

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