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CY8C24423A_09 PDF预览

CY8C24423A_09

更新时间: 2024-01-26 02:28:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
36页 919K
描述
Automotive PSoC Programmable System-on-Chip

CY8C24423A_09 数据手册

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CY8C24423A  
Automotive PSoC®  
Programmable System-on-Chip  
Additional System Resources  
Features  
I2C™ Slave, Master, or Multi-Master operation up to 400 kHz  
Watchdog and Sleep Timers  
AEC Qualified  
User-Configurable Low Voltage Detection  
Integrated Supervisory Circuit  
On-Chip Precision Voltage Reference  
Powerful Harvard Architecture Processor  
M8C Processor Speeds up to 24 MHz  
8x8 Multiply, 32-Bit Accumulate  
Low Power at High Speed  
3.0V to 5.25V Operating Voltage  
Automotive Temperature Range: -40°C to +85°C  
Complete Development Tools  
Free Development Software (PSoC Designer™)  
Full Featured, In-Circuit Emulator and Programmer  
Full Speed Emulation  
Complex Breakpoint Structure  
128K Bytes Trace Memory  
Advanced Peripherals (PSoC® Blocks)  
Six Rail-to-Rail Analog PSoC Blocks Provide:  
• Up to 14-Bit ADCs  
• Up to 9-Bit DACs  
• Programmable Gain Amplifiers  
• Programmable Filters and Comparators  
Four Digital PSoC Blocks Provide:  
• 8- to 32-Bit Timers, Counters, and PWMs  
• CRC and PRS Modules  
Logic Block Diagram  
Analog  
Drivers  
Port 2 Port 1 Port 0  
PSoC CORE  
• Full- or Half-Duplex UART  
System Bus  
• SPI Master or Slave  
• Connectable to all GPIO Pins  
Complex Peripherals by Combining Blocks  
Global Digital Interconnect  
Global Analog Interconnect  
Flash 4K  
SRAM  
SROM  
Precision, Programmable Clocking  
256 Bytes  
Internal ±5% 24/48 MHz Oscillator  
High Accuracy 24 MHz with Optional 32 kHz Crystal and PLL  
Optional External Oscillator, up to 24 MHz  
Internal Low Speed, Low Power Oscillator for Watchdog and  
Sleep Functionality  
Sleep and  
Watchdog  
CPU Core (M8C)  
Interrupt  
Controller  
Multiple Clock Sources  
(Includes IMO, ILO, PLL, and ECO)  
Flexible On-Chip Memory  
DIGITAL SYSTEM  
ANALOG SYSTEM  
4K Bytes Flash Program Storage, 1000 Erase/Write Cycles  
256 Bytes SRAM Data Storage  
In-System Serial Programming (ISSP)  
Partial Flash Updates  
Flexible Protection Modes  
EEPROM Emulation in Flash  
Analog  
Ref  
Digital  
Block  
Array  
Analog  
Block  
Array  
Analog  
Input  
Muxing  
(1 Row,  
4 Blocks)  
(2 Columns,  
6 Blocks)  
Programmable Pin Configurations  
25 mA Sink, 10 mA Drive on All GPIO  
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive  
Modes on All GPIO  
Up to 12 Analog Inputs on GPIO[1]  
Two 30 mA Analog Outputs on GPIO  
Configurable Interrupt on All GPIO  
POR and LVD  
System Resets  
Internal  
Voltage  
Ref.  
Digital  
Clocks  
Multiply  
Accum.  
Decimator  
I2C  
SYSTEM RESOURCES  
Note  
1. There are eight standard analog inputs on the GPIO. The other four analog inputs connect from the GPIO directly to specific switched-capacitor block inputs. See  
the PSoC Technical Reference Manual for more details.  
Cypress Semiconductor Corporation  
Document Number: 001-52469 Rev. *C  
198 Champion Court  
San Jose  
,
CA 95134-1709  
408-943-2600  
Revised July 22, 2009  
[+] Feedback  

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