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CY74FCT2543CTSOCR PDF预览

CY74FCT2543CTSOCR

更新时间： 2024-09-29 19:55:55
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
14页 613K
描述
FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24

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CY74FCT2543CTSOCR 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.4系列：FCT
JESD-30 代码：R-PDSO-G24JESD-609代码：e4
长度：15.4 mm逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：7 ns认证状态：Not Qualified
座面最大高度：2.65 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

CY74FCT2543CTSOCR 数据手册

 浏览型号CY74FCT2543CTSOCR的Datasheet PDF文件第2页浏览型号CY74FCT2543CTSOCR的Datasheet PDF文件第3页浏览型号CY74FCT2543CTSOCR的Datasheet PDF文件第4页浏览型号CY74FCT2543CTSOCR的Datasheet PDF文件第5页浏览型号CY74FCT2543CTSOCR的Datasheet PDF文件第6页浏览型号CY74FCT2543CTSOCR的Datasheet PDF文件第7页 
CY74FCT2543T  
8-BIT LATCHED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCCS042C – SEPTEMBER 1994 – REVISED NOVEMBER 2001  
Q OR SO PACKAGE  
(TOP VIEW)  
Function and Pinout Compatible With FCT  
and F Logic  
25- Output Series Resistors to Reduce  
Transmission-Line Reflection Noise  
LEBA  
OEBA  
V
CC  
CEBA  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
2
Reduced V  
of Equivalent FCT Functions  
(Typically = 3.3 V) Versions  
A
0
B
3
OH  
0
A
B
1
4
1
A
2
B
5
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
2
A
B
3
6
3
A
4
B
7
4
A
B
5
8
5
I
Supports Partial-Power-Down Mode  
off  
A
6
B
9
6
Operation  
A
B
7
LEAB  
10  
11  
7
Matched Rise and Fall Times  
CEAB  
Fully Compatible With TTL Input and  
Output Logic Levels  
GND 12  
13 OEAB  
12-mA Output Sink Current  
15-mA Output Source Current  
Separation Controls for Data Flow in Each  
Direction  
Back-to-Back Latches for Storage  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
3-State Outputs  
description  
The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable  
(LEAB, LEBA) and output enable (OEAB, OEBA) inputs permit each latch set to have independent control of  
inputting and outputting in either direction of data flow. For example, for data flow from A to B, the A-to-B enable  
(CEAB) input must be low to enter data from A or to take data from B, as indicated in the function table. With  
CEAB low, a low signal on the A-to-B latch enable (LEAB) input makes the A-to-B latches transparent; a  
subsequent low-to-high transition of LEAB puts the A latches in the storage mode and their outputs no longer  
change with the A inputs. With CEAB and OEAB both low, the 3-state B output buffers are active and reflect  
data present at the output of the A latches. Control of data from B to A is similar, but uses CEAB, LEAB, and  
OEAB inputs. On-chip termination resistors at the outputs reduce system noise caused by reflections. The  
CY74FCT2543T can replace the CY74FCT543T to reduce noise in an existing design.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

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