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CY74FCT16841TPVC PDF预览

CY74FCT16841TPVC

更新时间: 2024-09-29 14:48:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 111K
描述
Bus Driver, FCT Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.300 INCH, 0.025 INCH PITCH, SSOP-56

CY74FCT16841TPVC 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:0.300 INCH, 0.025 INCH PITCH, SSOP-56
针数:56Reach Compliance Code:not_compliant
风险等级:5.16Is Samacsys:N
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.064 A位数:10
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP56,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:9 ns认证状态:Not Qualified
座面最大高度:2.794 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

CY74FCT16841TPVC 数据手册

 浏览型号CY74FCT16841TPVC的Datasheet PDF文件第2页浏览型号CY74FCT16841TPVC的Datasheet PDF文件第3页浏览型号CY74FCT16841TPVC的Datasheet PDF文件第4页浏览型号CY74FCT16841TPVC的Datasheet PDF文件第5页浏览型号CY74FCT16841TPVC的Datasheet PDF文件第6页 
1CY74FCT162841T  
fax id: 7018  
CY74FCT16841T  
CY74FCT162841T  
20-Bit Latch  
• Reduced system switching noise  
Features  
• Typical V (ground bounce) <0.6V at V = 5V,  
OLP  
CC  
• Low power, pin-compatible replacement for ABT func-  
tions  
T = 25°C  
A
Functional Description  
• FCT-C speed at 5.5 ns  
• Power-off disable outputs permits live insertion  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
The CY74FCT16841T and CY74FCT162841T are 20-bit  
D-type latches designed for use in bus applications requiring  
high speed and low power. These devices can be used as two  
independent 10-bit latches, or as a single 10-bit latch, or as a  
single 20-bit latch by connecting the Output Enable (OE) and  
Latch (LE) inputs. Flow-through pinout and small shrink pack-  
aging aid in simplifying board layout. The output buffers are  
designed with a power-off disable feature to allow live insertion  
of boards.  
• Extended commercial range of 40°C to +85°C  
• V = 5V ± 10%  
CC  
The CY74FCT16841T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
CY74FCT16841T Features:  
• 64 mA sink current, 32 mA source current  
The CY74FCT162841T has 24-mA balanced output drivers  
with current limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for mini-  
mal undershoot and reduced ground bounce. The  
CY74FCT162841T is ideal for driving transmission lines.  
Typical V  
(ground bounce) <1.0V at V = 5V,  
CC  
OLP  
T = 25°C  
A
CY74FCT162841T Features:  
• Balanced output drivers: 24 mA  
Logic Block Diagrams  
Pin Configuration  
SSOP/TSSOP  
Top View  
OE  
1
OE  
Q
LE  
1
1
1
2
56  
55  
D
1
1
1
2
1
1
LE  
Q
D
2
1
1
3
4
54  
53  
GND  
GND  
D
D
1
1
1
1
3
4
5
6
7
8
9
52  
51  
50  
49  
48  
1
3
Q
Q
D
C
D
1
4
Q
1
1
V
CC  
V
CC  
Q
D
D
D
1
5
6
1
1
5
Q
1
6
Q
7
1
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1
7
GND  
Q
GND  
D
TO 9 OTHER CHANNELS  
1
1
8
9
FCT16841-1  
1
1
1
8
Q
D
D
9
OE  
2
Q
10  
1
10  
Q
1
D
1
D
2
D
3
2
2
2
2
LE  
Q
2
2
2
3
Q
2
D
1
2
GND  
D
GND  
D
C
2
2
4
5
Q
4
Q
5
2
2
Q
1
2
D
D
Q
6
2
6
2
V
CC  
V
CC  
Q
7
D
7
2
2
2
2
D
8
Q
8
TO 9 OTHER CHANNELS  
GND  
GND  
FCT16841-2  
Q
9
D
D
2
2
2
2
9
Q
10  
2
10  
OE  
LE  
2
FCT16841-3  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
July 1994 - Revised March 19, 1997  

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