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CY54FCT374TSOIC PDF预览

CY54FCT374TSOIC

更新时间: 2024-02-05 17:51:00
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
9页 100K
描述
8-Bit Registers

CY54FCT374TSOIC 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QLCC包装说明:LCC-20
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.16
Is Samacsys:N其他特性:POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION
系列:FCTJESD-30 代码:S-CQCC-N20
JESD-609代码:e0长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.032 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC20,.35SQ
封装形状:SQUARE封装形式:CHIP CARRIER
电源:5 VProp。Delay @ Nom-Sup:11 ns
传播延迟(tpd):11 ns认证状态:Not Qualified
筛选级别:38535Q/M;38534H;883B座面最大高度:1.905 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD触发器类型:POSITIVE EDGE
宽度:8.89 mmBase Number Matches:1

CY54FCT374TSOIC 数据手册

 浏览型号CY54FCT374TSOIC的Datasheet PDF文件第1页浏览型号CY54FCT374TSOIC的Datasheet PDF文件第2页浏览型号CY54FCT374TSOIC的Datasheet PDF文件第4页浏览型号CY54FCT374TSOIC的Datasheet PDF文件第5页浏览型号CY54FCT374TSOIC的Datasheet PDF文件第6页浏览型号CY54FCT374TSOIC的Datasheet PDF文件第7页 
CY54/74FCT374T  
CY54/74FCT574T  
Capacitance[2]  
Parameter  
CIN  
Description  
Typ.[5]  
Max.  
10  
Unit  
pF  
Input Capacitance  
Output Capacitance  
5
9
COUT  
12  
pF  
Power Supply Characteristics  
Parameter  
ICC  
Description  
Test Conditions  
Typ.[5]  
Max.  
0.2  
Unit  
Quiescent Power Supply Current  
VCC=Max., VIN0.2V, VINVCC–0.2V  
VCC=Max., VIN=3.4V,[8]  
f1=0, Outputs Open  
0.1  
0.5  
mA  
mA  
ICC  
Quiescent Power Supply Current  
(TTL inputs HIGH)  
2.0  
ICCD  
Dynamic Power Supply Current[9]  
VCC=Max., One Bit Toggling,  
50% Duty Cycle, Outputs Open,  
OE=GND, VIN0.2V or VINVCC–0.2V  
0.06  
0.7  
0.12  
1.4  
mA/MHz  
mA  
IC  
Total Power Supply Current[10]  
VCC=Max., f0=10 MHz,  
50% Duty Cycle, Outputs Open,  
One Bit Toggling at f1=5 MHz,  
OE=GND, VIN0.2V or VINVCC–0.2V  
VCC=Max., f0=10 MHz,  
1.2  
1.6  
3.9  
3.4  
mA  
mA  
mA  
50% Duty Cycle, Outputs Open,  
One Bit Toggling at f1=5 MHz,  
OE=GND, VIN=3.4V or VIN=GND  
VCC=Max., f0=10 MHz,  
3.2[11]  
50% Duty Cycle, Outputs Open,  
Eight Bits Toggling at f1=2.5 MHz,  
OE=GND, VIN0.2V or VINVCC–0.2V  
[11]  
VCC=Max., f0=10 MHz,  
12.2  
50% Duty Cycle, Outputs Open,  
Eight Bits Toggling at f1=2.5 MHz,  
OE=GND, VIN=3.4V or VIN=GND  
Notes:  
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.  
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.  
10. IC  
IC  
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC  
ICC+ICCDHNT+ICCD(f0/2 + f1N1)  
Quiescent Current with CMOS input levels  
Power Supply Current for a TTL HIGH input (VIN=3.4V)  
Duty Cycle for TTL inputs HIGH  
ICC  
ICC  
DH  
NT  
ICCD  
f0  
Number of TTL inputs at DH  
Dynamic Current caused by an input transition pair (HLH or LHL)  
Clock frequency for registered devices, otherwise zero  
Input signal frequency  
f1  
N1  
Number of inputs changing at f1  
All currents are in milliamps and all frequencies are in megahertz.  
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.  
3

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