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CY14B104MA-ZSP45XI PDF预览

CY14B104MA-ZSP45XI

更新时间: 2024-01-11 22:06:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器光电二极管时钟
页数 文件大小 规格书
31页 978K
描述
4 Mbit (512K x 8/256K x 16) nvSRAM with Real-Time-Clock

CY14B104MA-ZSP45XI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP54,.46,32
针数:54Reach Compliance Code:compliant
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.67Is Samacsys:N
最长访问时间:45 nsJESD-30 代码:R-PDSO-G54
JESD-609代码:e3长度:22.415 mm
内存密度:4194304 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:16混合内存类型:N/A
湿度敏感等级:3功能数量:1
端子数量:54字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP54,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3/3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.005 A
子类别:SRAMs最大压摆率:0.052 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:10.16 mm
Base Number Matches:1

CY14B104MA-ZSP45XI 数据手册

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PRELIMINARY  
CY14B104KA, CY14B104MA  
Pinouts  
Figure 1. Pin Diagram - 44/54-Pin TSOP II  
INT  
1
54  
53  
52  
51  
50  
49  
HSB  
NC  
INT  
[5]  
1
2
44  
43  
42  
41  
HSB  
NC  
[5]  
[4]  
NC  
A
0
2
3
NC  
[4]  
A
17  
A
3
4
5
6
7
8
NC  
0
A
1
A
4
16  
A
A
1
18  
A
2
A
15  
5
A
A
A
3
2
OE  
40  
39  
17  
6
48  
47  
46  
45  
A
4
BHE  
BLE  
DQ  
A
7
A
3
16  
CE  
8
A
38  
37  
36  
35  
34  
A
4
15  
DQ  
0
1
9
15  
CE  
OE  
DQ  
54 - TSOP II  
(x16)  
DQ  
DQ  
DQ  
DQ  
V
10  
11  
12  
13  
14  
14  
13  
12  
DQ  
44 - TSOP II  
(x8)  
9
10  
0
1
7
DQ  
DQ  
44  
43  
42  
41  
40  
39  
2
DQ  
V
DQ  
V
6
3
11  
12  
13  
14  
V
CC  
CC  
SS  
SS  
Top View  
(not to scale)  
Top View  
(not to scale)  
V
SS  
V
CC  
V
V
33  
32  
31  
SS  
CC  
DQ  
DQ  
DQ  
DQ  
DQ  
DQ  
4
15  
16  
17  
18  
DQ5  
11  
10  
2
3
DQ  
5
DQ4  
38  
37  
36  
35  
DQ  
DQ  
6
7
9
8
WE  
A
5
15  
16  
17  
18  
30  
29  
28  
27  
26  
25  
24  
23  
V
A
CAP  
DQ  
V
14  
WE  
A
5
19  
20  
21  
22  
23  
24  
CAP  
A
6
A
A
14  
13  
12  
34  
33  
32  
31  
30  
29  
28  
A
7
A
6
A
13  
A
A
A
A
7
A
8
19  
20  
21  
22  
8
12  
A
11  
A
11  
A
9
A
10  
A
10  
A
9
X1  
X2  
V
V
RTCcap  
NC  
X1  
X2  
25  
26  
27  
NC  
VRTCcap  
VRTCbat  
RTCbat  
Pin Definitions  
Pin Name  
A0 – A18  
A0 – A17  
IO Type  
Description  
Input  
Address Inputs Used to Select one of the 524,288 bytes of the nvSRAM for x8 Configuration.  
Address Inputs Used to Select one of the 262,144 words of the nvSRAM for x16 Configuration.  
DQ0 – DQ7 Input/Output Bidirectional Data IO Lines for x8 Configuration. Used as input or output lines depending on  
operation.  
DQ0 – DQ15  
Bidirectional Data IO Lines for x16 Configuration. Used as input or output lines depending on  
operation.  
NC  
No Connect No Connects. This pin is not connected to the die.  
Input  
Write Enable Input, Active LOW. When selected LOW, data on the IO pins is written to the specific  
address location.  
WE  
Input  
Input  
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.  
CE  
OE  
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read  
cycles. Deasserting OE HIGH causes the IO pins to tri-state.  
Input  
Input  
Byte High Enable, Active LOW. Controls DQ15 - DQ8.  
Byte Low Enable, Active LOW. Controls DQ7 - DQ0.  
Crystal Connection. Drives crystal on start up.  
Crystal Connection. For 32.768 KHz crystal.  
BHE  
BLE  
X1  
Output  
Input  
X2  
VRTCcap Power Supply Capacitor Supplied Backup RTC Supply Voltage. Left unconnected if VRTCbat is used.  
VRTCbat Power Supply Battery Supplied Backup RTC Supply Voltage. Left unconnected if VRTCcap is used.  
Notes  
4. Address expansion for 8 Mbit. NC pin not connected to die.  
5. Address expansion for 16 Mbit. NC pin not connected to die.  
Document #: 001-07103 Rev. *J  
Page 2 of 31  
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