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CMPWR120S/R PDF预览

CMPWR120S/R

更新时间: 2024-09-25 20:21:59
品牌 Logo 应用领域
CALMIRCO 光电二极管输出元件调节器
页数 文件大小 规格书
8页 115K
描述
Fixed Positive LDO Regulator, 3.3V, PDSO8, SOIC-8

CMPWR120S/R 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
Is Samacsys:N最大输入电压:5.5 V
最小输入电压:4.5 VJESD-30 代码:R-PDSO-G8
长度:4.9 mm功能数量:1
端子数量:8工作温度TJ-Max:125 °C
工作温度TJ-Min:最大输出电流 1:0.25 A
最大输出电压 1:3.465 V最小输出电压 1:3.135 V
标称输出电压 1:3.3 V封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
调节器类型:FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度:1.75 mm
表面贴装:YES端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.995 mmBase Number Matches:1

CMPWR120S/R 数据手册

 浏览型号CMPWR120S/R的Datasheet PDF文件第2页浏览型号CMPWR120S/R的Datasheet PDF文件第3页浏览型号CMPWR120S/R的Datasheet PDF文件第4页浏览型号CMPWR120S/R的Datasheet PDF文件第5页浏览型号CMPWR120S/R的Datasheet PDF文件第6页浏览型号CMPWR120S/R的Datasheet PDF文件第7页 
CALIFORNIA MICRO DEVICES  
CMPWR120  
250mA / 3.3V SmartOR™ POWER REGULATOR  
Features  
Applications  
• Automatic detection of VCC input supply  
• Drive output logic to control external switch  
• Glitch-free output during supply transitions  
• 250mA output maximum load current  
• Built-in hysteresis during supply selection  
• Controller operates from either VCC or VOUT  
• 8-pin SOIC narrow package  
• PCI adapter cards  
• Network Interface Cards (NIC’s)  
• Dual power systems  
• Systems with standby capabilities  
• See Application Note AP211  
Product Description  
California Micro Devices’ SmartORTM CMPWR120 is a  
low dropout regulator that delivers up to 250mA of load  
current at a fixed 3.3V output. An internal threshold level  
(typically 4.1V) is used to prevent the regulator from  
being operated below dropout voltage. The device  
continuously monitors the input supply and will automati-  
cally disable the regulator when VCC falls below the  
threshold level. When the regulator is disabled, the  
control signal “Drive” (Active Low) is enabled, which  
allows an external PMOS switch to power the load from  
an auxiliary 3.3V supply.  
When VCC is restored to a level above the select thresh-  
old, the control signal for the external PMOS switch is  
disabled and the regulator is once again enabled.  
All the necessary control circuitry needed to provide a  
smooth and automatic transition between the supplies  
has been incorporated. This allows VCC to be dynamically  
switched without loss of output voltage.  
PIN DIAGRAM, APPLICATION CIRCUIT, AND ELECTRICAL SCHEMATIC  
MGSF1P02ELT1  
Top View  
V
3.3V  
+
AUX  
V
1
2
3
4
8
7
6
5
DRIVE  
CC  
NC  
NC  
V
V
OUT  
OUT  
GND  
CMPWR120  
V
OUT  
3.3V  
V
CC  
DRIVE  
200mA  
GND  
NC  
+
C
IN  
V
OUT  
+
CMPWR120  
8-Pin SOIC Narrow  
V
1µF  
+
C
OUT  
CC  
5V  
GND  
4µ7  
Pin Diagram  
GND  
Typical Application Circuit  
DRIVE  
VCC  
+
DESELECT  
4.1V  
VREF  
3.3V  
ENABLE  
+
VOUT  
3.3V  
GND  
200mA  
Simplified Electrical Schematic  
C0610999  
©2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp.  
215 Topaz Street, Milpitas, California 95035  
Tel: (408) 263-3214  
Fax: (408) 263-7846  
www.calmicro.com  
1/26//2001  
1

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