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CM6807AR PDF预览

CM6807AR

更新时间: 2022-12-28 02:16:25
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虹冠电子 - CHAMP 功率因数校正控制器
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描述
10-PIN Green-Mode PFC/PWM Combo CONTROLLER for High Density AC Adapter

CM6807AR 数据手册

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CM6807(A;B;C)  
10-PIN Green-Mode PFC/PWM Combo CONTROLLER for High Density AC Adapter  
Functional Description  
Detailed Pin Descriptions  
The CM6807A consists of an ICST (Input Current Shaping  
Technique), CCM (Continuous Conduction Mode) or DCM  
(Discontinuous Conduction Mode) boost PFC (Power  
Factor Correction) front end and a synchronized PWM  
(Pulse Width Modulator) back end. The CM6807A is  
designed to replace FAN6803 (8 pin SOP package), which  
is the second generation of the ML4803 with 8 pin package.  
It is distinguished from earlier combo controllers by its low  
count, innovative input current shaping technique, and very  
low start-up and operating currents. The PWM section is  
dedicated to peak current mode operation. It uses  
conventional trailing-edge modulation, while the PFC uses  
IAC (Pin 2)  
Typically, it has a feedforward resistor, RAC, 2KK~10KK ohm  
resistor connected between this pin and rectified line input  
voltage.  
This pin serves 2 purposes:  
1.) During the startup condition, it supplies the startup  
current; therefore, the system does not requires  
additional bleed resistor to start up the chip.  
2.) The current of RAC will program the automatic  
slope compensation for the system. This  
feedforward signal can increase the signal to noise  
ratio for the light load condition or the high input line  
voltage condition.  
leading-edge  
modulation.  
This  
patented  
Leading  
Edge/Trailing Edge (LETE) modulation technique helps to  
minimize ripple current in the PFC DC buss capacitor.  
Optional Resistor between IAC and VCC:  
This resistor is about 100K ohm, it can improve the THD of  
the input current at high line and light load  
The main improvements from ML4803 are:  
1.  
2.  
Add Green Mode Functions for both PFC and PWM  
Remove the one pin error amplifier and add back the  
slew rate enhancement gmv, which is using voltage  
input instead of current input. This transconductance  
amplifier will increase the transient response 5 to 10  
times from the conventional OP  
ISENSE (Pin 3)  
This pin ties to a resistor which senses the PFC input  
current. This signal should be negative with respect to the IC  
ground. It internally feeds the pulse-by-pulse current limit  
comparator and the current sense feedback signal. The  
ILIMIT trip level is –1V. The ISENSE feedback is internally  
multiplied by a gain of four and compared against the internal  
programmed ramp to set the PFC duty cycle. The  
intersection of the boost inductor current downslope with the  
internal programming ramp determines the boost off-time.  
3.  
4.  
VFB PFC OVP comparator  
PFC Tri-Fault Detect for UL1950 compliance and  
enhanced safety  
5.  
A feedforward signal from IAC pin is added to do the  
automatic slope compensation. This increases the  
signal to noise ratio during the light load; therefore,  
THD is improved at light load and high input line  
voltage.  
It requires a RC filter between ISENSE and PFC boost  
sensing resistor.  
6.  
7.  
CM6807A does not require the bleed resistor and it  
uses the more than 800k ohm resistor between IAC  
pin and rectified line voltage to feed the initial current  
before the chip wakes up.  
VINOK comparator is added to guaranteed PWM  
cannot turn on until VFB reaches 2.5V in which PFC  
boost output is about steady state, typical 380V.  
A 10mS digital PWM soft start circuit is added  
10 pin SOP package  
VEAO (Pin 4)  
This is the PFC slew rate enhanced transconductance  
amplifier output which needs to connected with  
compensation network Ground.  
a
8.  
9.  
VFB (Pin 5)  
Besides this is the PFC slew rate enhanced  
transconductance input, it also tie to a couple of protection  
comparators, PFCOVP, and PFC Tri-Fault Detect  
10. No internal Zener but with VCCOVP comparator  
The CM6807A operates both PFC and PWM sections at  
67kHz. This allows the use of smaller PWM magnetic and  
output filter components, while minimizing switching losses  
in the PFC stage.  
V + I (Pin 6)  
This pin is tied to the primary side PWM current sense  
resistor or transformer. It provides the internal pulse-by-pulse  
current limit for the PWM stage (which occurs at 1.5V) and  
the peak current mode feedback path for the current mode  
control of the PWM stage. Besides current information, the  
optocouple also goes into V + I pin. Therefore, it is the SUM  
Amplifier input.  
Several protection features have been built into the  
CM6807A. These include soft-start, redundant PFC  
overvoltage protection, PFC Tri-Fault Detect, VINOK, peak  
current limiting, duty cycle limiting, under-voltage lockout,  
reference ok comparator and VCCOVP.  
Soft Start can be triggered by the following conditions:  
1.) During the startup (VCC is less than 10V)  
2.) DC to DC short (PWMtrifault is greater thanVCC-0.7V)  
2006/10/11 Rev1.0  
Champion Microelectronic Corporation  
Page 7  

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