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CLC501AWG-MLS PDF预览

CLC501AWG-MLS

更新时间： 2023-02-26 15:00:31
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
14页 382K
描述
IC OP-AMP, 5000 uV OFFSET-MAX, CDSO10, CERAMIC, SOIC-10, Operational Amplifier

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CLC501AWG-MLS 数据手册

 浏览型号CLC501AWG-MLS的Datasheet PDF文件第1页浏览型号CLC501AWG-MLS的Datasheet PDF文件第2页浏览型号CLC501AWG-MLS的Datasheet PDF文件第4页浏览型号CLC501AWG-MLS的Datasheet PDF文件第5页浏览型号CLC501AWG-MLS的Datasheet PDF文件第6页浏览型号CLC501AWG-MLS的Datasheet PDF文件第7页 
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Storage Temperature Range  
Lead Solder Duration (+300˚C)  
ESD Rating (Human Body Model)  
Recommended Gain Range  
−65˚C to +150˚C  
10 sec  
<
1000V  
+7 to +50  
−1 to −50  
±
7V  
Supply Voltage (VCC  
IOUT  
)
Operating Ratings  
Thermal Resistance  
Output is short circuit protected to  
ground, but maximum reliability will  
be maintained if IOUT does not  
exceed...  
Package  
MDIP  
(θJC  
)
(θJA)  
60mA  
70˚C/W  
65˚C/W  
125˚C/W  
145˚C/W  
±
Common Mode Input Voltage  
Junction Temperature  
VCC  
SOIC  
+150˚C  
Operating Temperature Range  
−40˚C to +85˚C  
Electrical Characteristics  
±
5 V, RL = 100Ω, Rf = 1.5Ω, VH = +3V; unless specified)  
(AV = +32, VCC  
=
Symbol  
Parameters  
Condition  
CLC501AJ  
Typ  
Max & Min Ratings(Note 2)  
Units  
Ambient Temperature  
Frequency Domain Response  
+25˚C  
−40˚C  
+25˚C  
+85˚C  
<
>
>
>
>
>
>
SSBW  
SS20  
–3dB Bandwidth  
VOUT 5VPP  
75  
60  
85  
60  
85  
45  
55  
MHz  
MHz  
<
@
AV = +20, VOUT  
110  
–3dB Bandwidth  
2VPP  
<
VOUT 5VPP  
Gain Flatness  
Peaking  
<
>
<
<
<
<
<
<
<
<
<
<
<
<
<
GFPL  
GFPH  
GFR  
15MHz  
15MHz  
30MHz  
0
0.1  
0.2  
1.0  
1.0  
0.1  
0.2  
1.0  
1.0  
0.1  
0.2  
1.3  
1.0  
dB  
dB  
Peaking  
0
Rolloff  
0.2  
0.2  
dB  
LPD  
Linear Phase Deviation  
DC to 30MHz  
deg  
Time Domain Response  
<
<
<
<
<
<
<
<
<
24  
TRS  
TRL  
TSP  
OS  
Rise and Fall Time  
2V Step  
5V Step  
2V Step  
2V Step  
4.7  
5.5  
12  
5.8  
6.5  
5.8  
6.5  
7.8  
8.0  
ns  
ns  
±
Settling Time to 0.05%  
18  
18  
ns  
<
<
<
5
Overshoot  
Slew Rate  
0
5
5
%
>
>
>
SR  
1200  
800  
800  
700  
V/µs  
Distortion And Noise Response  
<
<
<
<
<
<
HD2  
HD3  
2nd Harmonic Distortion  
3rd Harmonic Distortion  
Equivalent Input Noise  
Noise Floor  
2VPP, 20MHz  
2VPP, 20MHz  
−45  
−60  
−30  
−45  
−33  
−50  
−30  
−50  
dBc  
dBc  
>
<
<
<
−155  
SNF  
INV  
1MHz  
−158  
28  
−156  
−156  
dBm  
(1Hz)  
<
<
<
40  
Integrated Noise  
1MHZ to 100MHz  
35  
35  
µV  
Clamp Performance  
<
<
OVC  
TSO  
CDR  
VOC  
ICL  
Overshoot in Clamp  
32x Overdrive  
32x Overdrive  
5
1
–
15  
–
%
ns  
<
<
Overload Recovery from Clamp  
VioDrift after Recovery  
3
3
3
<
<
<
<
<
200  
<
0.2  
<
50  
150  
0.1  
20  
50  
200  
200  
µV  
V
>
<
Clamp Accuracy(Note 3)  
Input Bias Current on VH, VL  
–3dB Bandwidth  
2x Overdrive  
0.2  
100  
–
0.2  
<
50  
µA  
MHz  
V
CBW  
CMC  
VL,VH = 2VPP  
VH or VL  
–
–
<
<
<
±
3.3  
±
±
Useful Clamping Range  
3.0  
3.3  
Static, DC Performance  
<
<
<
<
5.0  
VIO  
Input Offset Voltage(Note 3)  
1.5  
10  
4.6  
3.0  
mV  
<
DVIO  
Average Temperature  
Coefficient  
20  
–
20  
µV/˚C  
<
<
<
IBN  
Input Bias Current(Note 3)  
Non-Inverting  
10  
37  
25  
35  
µA  
3
www.national.com  
1234567...14

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