Datasheet > CLC4550

CLC4550

更新时间： 2022-12-28 02:14:22

品牌	Logo	应用领域
CADEKA		比较器
页数	文件大小	规格书
11页	1534K
描述
Low Power, Low Offset, 2V to 36V Comparators

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CLC4550 数据手册

Data Sheet

Electrical Characteristics

T = 25°C (if bold, T = -40 to +85°C), V = +5V, -V = GND unless otherwise noted.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

DC Performance

V_IO

Input Offset Voltage

Input Bias Current

Input Offset Current

V_OUT= 1.4V, R_S= 0Ω, V_S= 5V to 30V

250

400

I_b

V_CM= 0V

I_OS

200

+V_S

- 1.5

CMIR

Common Mode Input Range ⁽³⁾

Voltage Gain

+V_S= 30V

200

0.7

V/mV

+V_S= 15V, R_L= ≥15kΩ, V_OUT= 1V to 11V

R_L= ∞, +V_S= 30V

1.7

3.0

1.0

2.0

2.5

3.0

2.0

3.0

Supply Current, CLC2550

Supply Current, CLC4550

0.6

1.2

0.9

R_L= ∞, +V_S= 5V

R_L= ∞, +V_S= 30V

R_L= ∞, +V_S= 5V

I_S

Time Domain Response

t_RLSLarge Signal Response Time

V_IN= TTL logic swing, V_REF= 1.4V, V_RL= 5V,

R_L= 5.1kΩ

200

1.3

0.9

0.8

μs

V_RL= 5V, R_L= 5.1kΩ, 5mV overdrive

V_RL= 5V, R_L= 5.1kΩ, 10mV overdrive

V_RL= 5V, R_L= 5.1kΩ, 15mV overdrive

t_R

Response Time

Output Characteristics

I_SINKOutput Sink Current

6.0

V_IN+= 0V, V_IN-= 1V, V_OUT= 1.5V

V_IN+= 1V, V_IN-= 0V, V_OUT= 5V

V_IN+= 1V, V_IN-= 0V, V_OUT= 30V

0.1

I_LEAK

Output Leakage Current

Saturation Voltage

μA

200

400

500

V_SAT

V_IN+= 0V, V_IN-= 1V, I_SINK≤ 4mA

Notes:

1. 100% tested at 25°C

2. Limits over the full temperature range are guaranteed by design.

3. The input common mode voltage of either input signal voltage should be kept > 0.3V at 25°C. The upper end of the common-mode voltage range is +V - 1.5V at

25°C, but either or both inputs can go to +18V without damages, independent of the magnitude of V .

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