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CLC-CAPT-PCASM

更新时间： 2024-09-25 03:25:47

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
15页	751K
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Data Capture Board User’s Guide

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数据手册

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CLC-CAPT-PCASM 数据手册

October 2000

CLC-CAPT-PCASM

Data Capture Board User’s Guide

Section I. Introduction

Table of Contents

I. Introduction

II. Capturing Data from ADC

Evaluation Boards

III. Capturing Data from the DRCS

Evaluation Boards

IV. Data Analysis using Matlab

Script Files

The CLC3790093 Data Capture Board enables simple evaluation

of National Semiconductor’s High Speed Analog to Digital Con-

verters (ADCs) and the Diversity Receiver Chip Set (DRCS). The

Data Capture Board interfaces the outputs of these devices to the

standard serial port available on the back of most Personal

Computers (PCs). We have provided PC software to control the

data capture function and Matlab^®scripts for data analysis.

A block diagram of the evaluation test bed is shown below.

The Data Capture Board contains a ﬁeld-programmable gate

array (FPGA) that controls its operation. An EPROM conﬁgures

the FPGA after power is applied. The serial interface is provided

by a UART (Universal Asynchronous Receiver/Transmitter), an

oscillator, and a level translator IC. The captured data is stored in

either three 32K x 8 static RAMs (organized into 24-bit words) or

in a FIFO containing 32K 18-bit words. LEDs provide a visual

indication of activity. DIP switches and a jumper conﬁgure several

capture functions.

Section II. Capturing Data from ADC

Evaluation Boards

Getting Started

To use the Data Capture board to capture data from a National

Semiconductor Analog to Digital converter, you will need the

following hardware, software, and documentation.

National Semiconductor

High-Speed Converter

Evaluation Test Bed

CLCXXXX

A/D Converter

Evaluation Board

Data

Capture

Board

Digital Receiver

Evaluation Board

Printed in the U.S.A.

http://www.national.com

12 3 4 5 6 7...15

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