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CL065764-55 PDF预览

CL065764-55

更新时间: 2024-09-30 19:45:07
品牌 Logo 应用领域
TEMIC 静态存储器内存集成电路
页数 文件大小 规格书
7页 98K
描述
Cache SRAM, 8KX8, 55ns, CMOS,

CL065764-55 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.84最长访问时间:55 ns
JESD-30 代码:X-XUUC-N28内存密度:65536 bit
内存集成电路类型:CACHE SRAM内存宽度:8
功能数量:1端口数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8KX8输出特性:3-STATE
可输出:YES封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP并行/串行:PARALLEL
认证状态:Not Qualified最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子位置:UPPERBase Number Matches:1

CL065764-55 数据手册

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MATRA MHS  
L 65764  
8 K × 8 / 3.3 Volts High Speed CMOS SRAM  
Description  
The L 65764 is a high speed CMOS static RAM organized Easy memory expansion is provided by active low chip  
as 8192 × 8 bits. It is manufactured using MHS high select (CS1), an active high chip select (CS2), an active  
performance CMOS technology.  
low output enable (OE) and three state drivers.  
Access times as fast as 25 ns are available with maximum  
power consumption of only 216 mW.  
L 65764 provides fast access time with 3,3 volts power  
supply, perfectly designed for portable applications (PC  
cache memory... etc).  
The L 65764 features fully static operation requiring no  
external clocks or timing strobes. The automatic  
power-down feature reduces the power consumption by  
73 % when the circuit is deselected.  
Features  
D Single supply 3.3 V ± 0.3 V  
D Fast access time  
D 300 and 600 mils width package  
D Asynchronous  
Commercial : 25/35/45/55 ns (max)  
D Low power consumption  
Active : 216 mW (typ)  
D Capable of withstanding greater than 2000 V electrostatic  
discharge  
Standby : 36 mW (typ)  
Interface  
Block Diagram  
Rev. C (22/12/94)  
1

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