CD74HCT139M96G4

更新时间： 2024-11-20 05:28:03

品牌	Logo	应用领域
德州仪器 - TI		解复用器
页数	文件大小	规格书
13页	415K
描述
High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer

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数据手册
替代型号

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CD74HCT139M96G4 数据手册

CD54HC139, CD74HC139,

CD54HCT139, CD74HCT139

Data sheet acquired from Harris Semiconductor

SCHS148D

High-Speed CMOS Logic

Dual 2- to 4-Line Decoder/Demultiplexer

September 1997 - Revised October 2003

Features

Description

• Multifunction Capability

The ’HC139 and ’HCT139 devices contain two independent

binary to one of four decoders each with a single active low

enable input (1E or 2E). Data on the select inputs (1A0 and

1A1 or 2A0 and 2A1) cause one of the four normally high

outputs to go low.

- Binary to 1 of 4 Decoders or 1 to 4 Line

Demultiplexer

[ /Title

(CD74

HC139

CD74

HCT13

• Active Low Mutually Exclusive Outputs

• Fanout (Over Temperature Range)

If the enable input is high all four outputs remain high. For

demultiplexer operation the enable input is the data input.

The enable input also functions as a chip select when these

devices are cascaded. This device is functionally the same

as the CD4556B and is pin compatible with it.

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

/Sub-

ject

The outputs of these devices can drive 10 low power

Schottky TTL equivalent loads. The HCT logic family is

functionally as well as pin equivalent to the LS logic family.

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

(High

Speed

CMOS

Logic

Dual

2-to-4

Line

Decod

• HC Types

Ordering Information

- 2V to 6V Operation

- High Noise Immunity: N = 30%, N = 30%of V

IL IH

TEMP. RANGE

= 5V

PART NUMBER

CD54HC139F3A

CD54HCT139F3A

CD74HC139E

( C)

PACKAGE

16 Ld CERDIP

16 Ld PDIP

16 Ld SOIC

16 Ld PDIP

16 Ld SOIC

• HCT Types

-55 to 125

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

CD74HC139M

• Memory Decoding, Data Routing, Code Conversion

CD74HC139MT

CD74HC139M96

CD74HCT139E

CD74HCT139M

CD74HCT139MT

CD74HCT139M96

Pinout

CD54HC139, CD54HCT139

(CERDIP)

CD74HC139, CD74HCT139

(PDIP, SOIC)

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel. The sufﬁx T denotes a small-quantity reel of

250.

TOP VIEW

1A0

1A1

1Y0

1Y1

1Y2

1Y3

GND

16 V

15 2E

14 2A0

13 2A1

12 2Y0

11 2Y1

10 2Y2

2Y3

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...13

中文翻译

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CD74HCT139M96G4 替代型号

型号	品牌	替代类型	描述	数据表
CD74HCT139M	TI	完全替代	High-Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer
74HCT139D	NXP	功能相似	Dual 2-to-4 line decoder/demultiplexer

与CD74HCT139M96G4相关器件

型号	品牌	获取价格	描述	数据表
CD74HCT139ME4	TI	获取价格	High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer
CD74HCT139MG4	TI	获取价格	High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer
CD74HCT139MT	TI	获取价格	High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer
CD74HCT139MTE4	TI	获取价格	High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer
CD74HCT139MTG4	TI	获取价格	High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer
CD74HCT14	TI	获取价格	High Speed CMOS Logic Hex Inverting Schmitt Trigger
CD74HCT147	TI	获取价格	High Speed CMOS Logic 10-to-4 Line Priority Encoder
CD74HCT147E	TI	获取价格	High Speed CMOS Logic 10-to-4 Line Priority Encoder
CD74HCT147E	RENESAS	获取价格	IC,ENCODER,HCT-CMOS,DIP,16PIN,PLASTIC
CD74HCT147EE4	TI	获取价格	High-Speed CMOS Logic 10- to 4-Line Priority Encoder

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