CD74FCT244, CD74FCT244AT
BiCMOS OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCBS722B – JULY 2000 – REVISED AUGUST 2003
CD74FCT244 . . . E, M, OR SM PACKAGE
CD74FCT244AT . . . E OR M PACKAGE
(TOP VIEW)
BiCMOS Technology With Low Quiescent
Power
Buffered Inputs
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
Noninverted Outputs
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
Input/Output Isolation From V
CC
Controlled Output Edge Rates
64-mA Output Sink Current
Output Voltage Swing Limited to 3.7 V
SCR Latch-Up-Resistant BiCMOS Process
and Circuit Design
description/ordering information
The CD74FCT244 and CD74FCT244AT are octal
buffer/line drivers with 3-state outputs using a
small-geometryBiCMOStechnology. The output stages are a combination of bipolar and CMOS transistors that
limit the output high level to two diode drops below V . This resultant lowering of output swing (0 V to 3.7 V)
CC
reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes V bounce and
CC
ground bounce and their effects during simultaneous output switching. The output configuration also enhances
switching speed and is capable of sinking 64 mA.
These devices are organized as two 4-bit buffers/line drivers with separate active-low output-enable (OE)
inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs
are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – E
SOIC – M
Tube
CD74FCT244E
CD74FCT244E
Tube
CD74FCT244M
74FCT244M
Tape and reel
CD74FCT244M96
CD74FCT244SM96
CD74FCT244ATE
CD74FCT244ATM
CD74FCT244ATM96
0°C to 70°C
SSOP – SM Tape and reel
FCT244SM
PDIP – E
Tube
CD74FCT244ATE
Tube
SOIC – M
74FCT244ATM
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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