是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
Reach Compliance Code: | not_compliant | 风险等级: | 5.82 |
Is Samacsys: | N | JESD-30 代码: | R-XDIP-T14 |
JESD-609代码: | e0 | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | NAND GATE | 最大I(ol): | 0.004 A |
端子数量: | 14 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 封装主体材料: | CERAMIC |
封装代码: | DIP | 封装等效代码: | DIP14,.3 |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
电源: | 5 V | Prop。Delay @ Nom-Sup: | 36 ns |
认证状态: | Not Qualified | 施密特触发器: | NO |
筛选级别: | 38535Q/M;38534H;883B | 子类别: | Gates |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | CMOS | 温度等级: | MILITARY |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD54HCT10H/3 | RENESAS |
获取价格 |
HCT SERIES, TRIPLE 3-INPUT NAND GATE, UUC14 | |
CD54HCT10H/3A | RENESAS |
获取价格 |
HCT SERIES, TRIPLE 3-INPUT NAND GATE, UUC14 | |
CD54HCT10M | ETC |
获取价格 |
Logic IC | |
CD54HCT11 | TI |
获取价格 |
High Speed CMOS Logic Triple 3-Input AND Gate | |
CD54HCT112 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD54HCT112E | ETC |
获取价格 |
Logic IC | |
CD54HCT112EN | ETC |
获取价格 |
Logic IC | |
CD54HCT112F | RENESAS |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 | |
CD54HCT112F | ROCHESTER |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 | |
CD54HCT112F/3 | RENESAS |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 |