CD54HC42, CD74HC42,
CD74HCT42
Data sheet acquired from Harris Semiconductor
SCHS133C
High-Speed CMOS Logic
August 1997 - Revised May 2003
BCD-to-Decimal Decoders (1 of 10)
Features
Description
• Buffered Inputs and Outputs
The ’HC42 and CD74HCT42 BCD-to-Decimal Decoders
utilize silicon-gate CMOS technology to achieve operating
speeds similar to LSTTL decoders with the low power
consumption of standard CMOS integrated circuits. These
devices have the capability of driving 10 LSTLL loads and
are compatible with the standard LS logic family. One of ten
outputs (low on select) is selected in accordance with the
BCD input. Non-valid BCD inputs result in none of the
• Typical Propagation Delay: 12ns at V
o
= 5V,
[ /Title
(CD74H
C42,
CC
C = 15pF, T = 25 C
L
A
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
CD74H
CT42)
/Subject
(High
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C outputs being selected (all outputs are high).
• Balanced Propagation Delay and Transition Times
Ordering Information
Speed
• Significant Power Reduction Compared to LSTTL
o
CMOS
Logic
BCD To
Deci-
PART NUMBER
CD54HC42F3A
CD74HC42E
TEMP. RANGE ( C)
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld PDIP
Logic ICs
• HC Types
- 2V to 6V Operation
-55 to 125
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
CD74HC42M
-55 to 125
16 Ld SOIC
16 Ld PDIP
at V
= 5V
CC
• HCT Types
CD74HCT42E
-55 to 125
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Pinout
CD54HC42
(CERDIP)
CD74HC42
(PDIP, SOIC)
CD74HCT42
(PDIP)
TOP VIEW
Y0
Y1
1
2
3
4
5
6
7
8
16 V
CC
15 A0
14 A1
13 A2
12 A3
11 Y9
10 Y8
Y2
Y3
Y4
Y5
Y6
9
Y7
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003 Texas Instruments Incorporated.
1