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CD54HC32W96 PDF预览

CD54HC32W96

更新时间: 2024-02-17 06:57:24
品牌 Logo 应用领域
德州仪器 - TI 输入元件逻辑集成电路
页数 文件大小 规格书
15页 612K
描述
HC/UH SERIES, QUAD 2-INPUT OR GATE, UUC14

CD54HC32W96 技术参数

生命周期:Obsolete包装说明:DIE,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.76系列:HC/UH
JESD-30 代码:X-XUUC-N14逻辑集成电路类型:OR GATE
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP传播延迟(tpd):135 ns
认证状态:Not Qualified最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

CD54HC32W96 数据手册

 浏览型号CD54HC32W96的Datasheet PDF文件第2页浏览型号CD54HC32W96的Datasheet PDF文件第3页浏览型号CD54HC32W96的Datasheet PDF文件第4页浏览型号CD54HC32W96的Datasheet PDF文件第5页浏览型号CD54HC32W96的Datasheet PDF文件第6页浏览型号CD54HC32W96的Datasheet PDF文件第7页 
CD54HC32, CD74HC32,  
CD54HCT32, CD74HCT32  
Data sheet acquired from Harris Semiconductor  
SCHS274C  
High-Speed CMOS Logic  
Quad 2-Input OR Gate  
September 1997 - Revised September 2003  
Features  
Description  
• Typical Propagation Delay: 7ns at V  
CC  
= 5V,  
The ’HC32 and ’HCT32 contain four 2-input OR gates in one  
package. Logic gates utilize silicon gate CMOS technology  
to achieve operating speeds similar to LSTTL gates with the  
low power consumption of standard CMOS integrated cir-  
cuits. All devices have the ability to drive 10 LSTTL loads.  
The HCT logic family is functionally pin compatible with the  
standard LS logic family.  
o
C = 15pF, T = 25 C  
L
A
[ /Title  
(CD54  
HCT32  
,
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
CD74  
HC32,  
CD74  
HCT32  
)
/Sub-  
ject  
(High  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
TEMP. RANGE  
o
PART NUMBER  
CD54HC32F3A  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
• HC Types  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- 2V to 6V Operation  
CD54HCT32F3A  
CD74HC32E  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
IL  
IH  
at V  
= 5V  
CC  
• HCT Types  
CD74HC32M  
- 4.5V to 5.5V Operation  
CD74HC32MT  
CD74HC32M96  
CD74HCT32E  
CD74HCT32M  
CD74HCT32MT  
CD74HCT32M96  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
Pinout  
CD54HC32, CD54HCT32  
(CERDIP)  
CD74HC32, CD74HCT32  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 4B  
12 4A  
11 4Y  
10 3B  
1Y  
2A  
2B  
2Y  
9
8
3A  
3Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated.  
1

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