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CD4048BFMSR PDF预览

CD4048BFMSR

更新时间: 2024-09-25 15:29:19
品牌 Logo 应用领域
瑞萨 - RENESAS 输入元件逻辑集成电路触发器
页数 文件大小 规格书
11页 146K
描述
4000/14000/40000 SERIES, 8-INPUT AND-OR GATE, CDIP16, FRIT SEALED, DIP-16

CD4048BFMSR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.72
其他特性:CONFIGURABLE AS NOR/OR/NAND/AND/OR-AND/OR-NAND/AND-NOR系列:4000/14000/40000
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:AND-OR GATE最大I(ol):0.00036 A
功能数量:1输入次数:8
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 VProp。Delay @ Nom-Sup:810 ns
传播延迟(tpd):810 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:MIL-PRF-38535 Class V
座面最大高度:5.08 mm子类别:Gates
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED总剂量:100k Rad(Si) V
宽度:7.62 mmBase Number Matches:1

CD4048BFMSR 数据手册

 浏览型号CD4048BFMSR的Datasheet PDF文件第2页浏览型号CD4048BFMSR的Datasheet PDF文件第3页浏览型号CD4048BFMSR的Datasheet PDF文件第4页浏览型号CD4048BFMSR的Datasheet PDF文件第5页浏览型号CD4048BFMSR的Datasheet PDF文件第6页浏览型号CD4048BFMSR的Datasheet PDF文件第7页 
CD4048BMS  
CMOS Multifunction  
Expandable 8 Input Gate  
December 1992  
Features  
Pinout  
• High-Voltage Type (20V Rating)  
CD4048BMS  
TOP VIEW  
• Three State Output  
• Many Logic Functions Available in One Package  
• Standardize, Symmetrical Output Characteristics  
• 100% Tested for Quiescent Current at 20V  
J (OUTPUT)  
1
2
3
4
5
6
7
8
16 VDD  
15 EXPAND  
14 A  
Kd  
H
• Maximum Input Current of 1µA at 18V Over Full Pack-  
G
INPUTS  
F
13 B  
age Temperature Range; 100nA at 18V and +25oC  
INPUTS  
12 C  
11 D  
10 Ka  
• Noise Margin (Over Full Package Temperature Range):  
- 1V at VDD = 5V  
E
Kb  
- 2V at VDD = 10V  
9
Kc  
VSS  
- 2.5V at VDD = 15V  
• 5V, 10V and 15V Parametric Ratings  
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
Functional Diagram  
Applications  
BINARY CONTROL INPUTS  
FUNCTION CONTROL  
• Selection of Up to 8 Logic Functions  
• Digital Control of Logic  
3 STATE  
CONTROL  
Ka Kb Kc Kd  
10  
• General Purpose Gating Logic  
- Decoding  
7
9
2
A
B
C
D
14  
13  
12  
11  
- Encoding  
INPUTS  
Description  
EXPAND  
15  
I
J OUTPUT  
CD4048BMS is an 8-input gate having four control inputs. Three  
binary control inputs - Ka, Kb, and Kc - provide the implementa-  
tion of eight different logic functions. These functions are OR,  
NOR, AND, NAND, OR/AND, OR/NAND, AND/OR and AND/  
NOR.  
E
F
G
H
6
5
4
3
INPUTS  
VSS = 8  
VDD = 16  
A fourth control input, Kd, provides the user with a 3-state output.  
When control input Kd is high, the output is either a logic 1 or a  
logic 0 depending on the inner states. When control input Kd is  
low, the output is an open circuit. This feature enables the user to  
connect this device to a common bus line.  
In addition to the eight input lines, an EXPAND input is provided  
that permits the user to increase the number of inputs into a  
CD4048BMS (see Figure 2). For example, two CD4048BMS’s  
can be cascaded to provided a 16-input multifunction gate. When  
the EXPAND input is not used, it should be connected to VSS.  
The CD4048BMS is supplied in these 16 lead outline packages:  
Braze Seal DIP  
Frit Seal DIP  
H4S  
H1E  
Ceramic Flatpack H6W  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3314  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-912  

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