CD4047BC PDF预览

CD4047BC

更新时间: 2025-08-08 22:15:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 振荡器
页数 文件大小 规格书
9页 88K
描述
Low Power Monostable/Astable Multivibrator

CD4047BC 数据手册

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October 1987  
Revised May 1999  
CD4047BC  
Low Power Monostable/Astable Multivibrator  
True and complemented buffered outputs  
General Description  
The CD4047B is capable of operating in either the  
Only one external R and C required  
monostable or astable mode. It requires an external capac-  
MONOSTABLE MULTIVIBRATOR FEATURES  
itor (between pins 1 and 3) and an external resistor  
(between pins 2 and 3) to determine the output pulse width  
in the monostable mode, and the output frequency in the  
astable mode.  
Positive- or negative-edge trigger  
Output pulse width independent of trigger pulse duration  
Retriggerable option for pulse width expansion  
Astable operation is enabled by a high level on the astable  
input or low level on the astable input. The output fre-  
quency (at 50% duty cycle) at Q and Q outputs is deter-  
mined by the timing components. A frequency twice that of  
Q is available at the Oscillator Output; a 50% duty cycle is  
not guaranteed.  
Long pulse widths possible using small RC components  
by means of external counter provision  
Fast recovery time essentially independent of pulse  
width  
Pulse-width accuracy maintained at duty cycles  
approaching 100%  
Monostable operation is obtained when the device is trig-  
gered by LOW-to-HIGH transition at + trigger input or  
HIGH-to-LOW transition at trigger input. The device can  
be retriggered by applying a simultaneous LOW-to-HIGH  
transition to both the + trigger and retrigger inputs.  
ASTABLE MULTIVIBRATOR FEATURES  
Free-running or gatable operating modes  
50% duty cycle  
A high level on Reset input resets the outputs Q to LOW, Q  
to HIGH.  
Oscillator output available  
Good astable frequency stability  
typical= ±2% + 0.03%/°C @ 100 kHz  
frequency= ±0.5% + 0.015%/°C @ 10 kHz  
deviation (circuits trimmed to frequency VDD = 10V  
±10%)  
Features  
Wide supply voltage range: 3.0V to 15V  
High noise immunity: 0.45 VDD (typ.)  
Low power TTL compatibility: Fan out of 2 driving 74L  
or 1 driving 74LS  
Applications  
Frequency discriminators  
SPECIAL FEATURES  
Timing circuits  
Time-delay applications  
Envelope detection  
Frequency multiplication  
Frequency division  
Low power consumption: special CMOS oscillator  
configuration  
Monostable (one-shot) or astable (free-running)  
operation  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4047BCM  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
CD4047BCN  
N14A  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
© 1999 Fairchild Semiconductor Corporation  
DS005969.prf  
www.fairchildsemi.com  

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