Datasheet
BU9797FUV-M
MAX 144 segments (SEG36×COM4)
Read command register and transfer method
Also the command registers can be read during read mode.
The sequence for the command register read is shown below and is similar to the display data read sequence.
Slave address
0111110
Command
110 1100
Command
ADSET
Slave address
NA
P
S
0
A
1
A
0111110
1
A
Data
A
S
Set ICSET [P2]=1
R/W
R/W
Regarding address setting, please refer to ADSET command.
It will be able to read register values if it set address 24h or 25h.
Address does not increment automatically after register value read.
Register
REG1
D7 D6 D5 D4 D3 D2 D1 D0
P5 P4 P3 P2 P1 P0
P7 P6 P5 P4 P3 P2 P1 P0
Address
24h
0
0
REG2
25h
REG1:
REG2:
P5 = Bias setting
P4 = Internal/External clock setting
P3 = Software Reset setting
P2 to P0 = Blink setting
P7 to P6 = Frame Frequency (FR) setting
P5 to P4 = Power Save Mode (SR) setting
P3 = Frame/Line inversion setting
P2 = Display ON/OFF setting
P1 = APON setting
P0 = APOFF setting
Address map between ADSET and ICSET is shown as follows;
Write Mode
ADSET
ICSET
RAM address
D7 D6 D5
D[4:0]
D7 D6 D5 D4 D3 D2* D1 D0
00 0000 to 01 1111 (bin)
10 0000 to 10 0011 (bin)
0
0
0
0
0
0
0 0000 to 1 1111
0 0000 to 0 0011
1
1
1
1
1
1
0
0
1
1
0
1
0
0
0
0
Read mode
ADSET
ICSET
D7 D6 D5 D4 D3 D2* D1 D0
RAM address
D7 D6 D5
D[4:0]
00 0000 to 01 1111 (bin)
10 0000 to 10 0101 (bin)
1
1
0
0
0
0
0 0000 to 1 1111
0 0000 to 0 0101
1
1
1
1
1
1
0
0
1
1
0
1
0
0
0
0
(Note) Please take care ICSET [P2] setting.
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TSZ02201-0P4P0D300430-1-2
5.Aug.2014 Rev.002
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