Datasheet > BU7851FS-E2

BU7851FS-E2

更新时间： 2022-12-14 18:00:09

品牌	Logo	应用领域
罗姆 - ROHM		驱动器
页数	文件大小	规格书
25页	477K
描述
Serial / Parallel 4-input Drivers

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数据手册

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BU7851FS-E2 数据手册

Technical Note

BU2050F,BU2092F,BU2092FV,BU2099FV,BD7851FP,BU2152FS

●Operating description

(1) Data clear

When the reset terminal (CLR, CLB) is set to “L”, the content of all latch circuits are set to “H”, and all parallel outputs are

initialised.

(For model with reset terminal only)

(2) Data transfer

Serial data is sequentially input to the shift register during the rise of the clock time (strobe signal is not active). When

the strobe signal is active, the content of the shift register are transferred to the latch circuit.

(3) Cascade connection

Serial input data is output from the serial output through the shift register, regardless of the strobe signal.

(except

for

BU2050F,

BU2092F/BU2092FV)

●Application circuit

P1 P2

Pn-2 Pn-1 Pn

(*)

VDD

Serial data input

Clock input

VSS

MPU

Strobe input

Latch input

Serial data output

VSS

P1 P2

Pn-2 Pn-1 Pn

VSS

VDD

Serial data input

Clock input

Strobe input

Latch input

Serial data output

Fig. 1

(*C1 must be placed as close to the terminal as possible.)

●Interfaces

BU2050F

BU2092F/BU2092FV

DATA, CLOCK, STB, CLR

P1～P8

DATA, CLOCK, LCK, OE

Q0～Q11

VDD

OUT

INPUT

OUTPUT

GND(VSS)

BU2099FV

DATA, CLOCK, LCK, OE

BU2099FV

Q0～Q11

BU2099FV

BU2152FS

CLOCK, DATA, STB, CLB

VDD

OUT

GND(VSS)

(only OE pin)

GND(VSS)

BU2152FS

P1～P28

VDD

VSS

GND(VSS)

GND(VSS) GND(VSS)

VSS

www.rohm.com

2009.06 - Rev.A

6/24

1...3 4 567 8 9...25

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