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BTS50101EKAXUMA1 PDF预览

BTS50101EKAXUMA1

更新时间: 2024-01-13 13:04:11
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动光电二极管接口集成电路
页数 文件大小 规格书
53页 2330K
描述
Buffer/Inverter Based Peripheral Driver, 10A, PDSO14, GREEN, PLASTIC, MS-012BB, SOP-14

BTS50101EKAXUMA1 技术参数

生命周期:Active包装说明:HLSOP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.68内置保护:TRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL; UNDER VOLTAGE
接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVERJESD-30 代码:R-PDSO-G14
长度:8.65 mm功能数量:1
端子数量:14输出电流流向:SINK
标称输出峰值电流:10 A封装主体材料:PLASTIC/EPOXY
封装代码:HLSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE座面最大高度:1.7 mm
最大供电电压:28 V最小供电电压:5 V
标称供电电压:13.5 V表面贴装:YES
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL断开时间:250 µs
接通时间:250 µs宽度:3.9 mm
Base Number Matches:1

BTS50101EKAXUMA1 数据手册

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BTS5010-1EKA  
General Product Characteristics  
Table 2  
TJ = -40 °C to +150 °C; (unless otherwise specified)  
Absolute Maximum Ratings (cont’d)1)  
Parameter  
Symbol  
Values  
Typ.  
Unit Note /  
Number  
Test Condition  
Min.  
Max.  
Currents  
Current through ground pin  
I GND  
-20  
-150  
20  
20  
mA  
P_4.1.27  
t < 2 min  
Temperatures  
Junction temperature  
Storage temperature  
ESD Susceptibility  
ESD susceptibility (all pins)  
TJ  
-40  
-55  
150  
150  
°C  
°C  
P_4.1.28  
P_4.1.30  
TSTG  
VESD  
-2  
-4  
2
4
kV  
kV  
4) HBM  
4) HBM  
P_4.1.31  
P_4.1.32  
ESD susceptibility OUT Pin VESD  
vs. GND and VS connected  
ESD susceptibility  
VESD  
VESD  
-500  
-750  
500  
750  
V
V
5) CDM  
5) CDM  
P_4.1.33  
P_4.1.34  
ESD susceptibility pin  
(corner pins)  
1) Not subject to production test. Specified by design.  
2)EOL tests according to AECQ100-012. Threshold limit for short circuit failures: 100ppm. Please refer to the legal disclaimer  
for short circuit capability on the Page 53 of this document.  
3) VS(LD) is setup without the DUT connected to the generator per ISO 7637-1.  
4) ESD susceptibility HBM according to ANSI/ESDA/JEDEC JS-001-2010  
5) “CDM” ESDA STM5.3.1  
Notes  
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the  
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not  
designed for continuous repetitive operation.  
Data Sheet  
PROFET™+ 12V  
10  
Rev. 2.0, 2011-08-19  

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