Very Low Power/Voltage CMOS SRAM
512K X 16 bit
BSI
BS616LV8013
FEATURES
DESCRIPTION
• Very low operation voltage : 2.4~3.6V
• Very low power consumption :
The BS616LV8013 is a high performance, very low power CMOS Static
Random Access Memory organized as 524,288 words by 16 bits and
operates from a wide range of 2.4V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.5uA and maximum access time of 70/100ns in 3V operation.
Easy memory expansion is provided by an active LOW chip enable(CE1),
active HIGH chip enable (CE2), active LOW output enable(OE) and
three-state output drivers.
Vcc = 3.0V C-grade: 20mA (Max.) operating current
I-grade : 25mA (Max.) operating current
0.5uA (Typ.) CMOS standby current
• High speed access time :
-70
-10
70ns (Max.) at Vcc=3V
100ns (Max.) at Vcc=3V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
The BS616LV8013 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2,CE1 and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
The BS616LV8013 is available in 48-pin BGA package.
PRODUCT FAMILY
POWER DISSIPATION
SPEED
(ns)
STANDBY
Operating
OPERATING
Vcc
(ICCSB1, Max)
(ICC, Max)
PRODUCT FAMILY
PKG TYPE
TEMPERATURE
RANGE
Vcc=3V
70 / 100
70 / 100
Vcc=3V
3uA
Vcc=3V
20mA
25mA
BS616LV8013BC
BS616LV8013BI
+0 O C to +70O
-40O C to +85O
C
C
2.4V ~ 3.6V
2.4V ~ 3.6V
BGA-48-0810
BGA-48-0810
6uA
PIN CONFIGURATIONS
BLOCK DIAGRAM
A4
A3
A2
1
2
3
4
5
6
A1
A0
A17
A16
A15
A14
A13
A12
Address
Input
A
B
C
D
LB
OE
A0
A1
A2
CE2
22
2048
Row
Memory Array
2048 x 4096
Buffer
D8
D9
UB
A3
A5
A4
A6
CE1
D1
D0
D2
Decoder
D10
4096
Data
16
16
Column I/O
Input
D0
VSS D11
VCC D12
A17
A7
D3
D4
VCC
Buffer
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
16
256
A16
A15
A13
A10
Data
VSS
A14
VSS
D6
E
F
16
Output
Buffer
Column Decoder
D15
D5
D14
D15
A18
D13
CE2
16
CE1
WE
OE
WE
A11
D7
A12
A9
G
H
N.C
A8
Control
Address Input Buffer
UB
LB
A11 A10 A9 A8 A7
A6 A5 A18
NC
Vcc
Gnd
48-Ball CSP top View
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
Revision 2.0
April 2002
R0201-BS616LV8013
1