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BQ4845YS-A4TR PDF预览

BQ4845YS-A4TR

更新时间: 2024-02-13 07:35:28
品牌 Logo 应用领域
德州仪器 - TI 计时器或实时时钟微控制器和处理器外围集成电路光电二极管监控双倍数据速率
页数 文件大小 规格书
22页 1114K
描述
Parallel RTC With CPU Supervisor

BQ4845YS-A4TR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-28
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.81
Is Samacsys:N最大时钟频率:0.032 MHz
外部数据总线宽度:8信息访问方法:PARALLEL, DIRECT ADDRESS
中断能力:YJESD-30 代码:R-PDSO-G28
JESD-609代码:e4长度:17.9705 mm
湿度敏感等级:1端子数量:28
计时器数量:1最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP28,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:2.667 mm
子类别:Timer or RTC最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL最短时间:SECONDS
处于峰值回流温度下的最长时间:NOT SPECIFIED易失性:NO
宽度:7.5565 mmuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

BQ4845YS-A4TR 数据手册

 浏览型号BQ4845YS-A4TR的Datasheet PDF文件第2页浏览型号BQ4845YS-A4TR的Datasheet PDF文件第3页浏览型号BQ4845YS-A4TR的Datasheet PDF文件第4页浏览型号BQ4845YS-A4TR的Datasheet PDF文件第5页浏览型号BQ4845YS-A4TR的Datasheet PDF文件第6页浏览型号BQ4845YS-A4TR的Datasheet PDF文件第7页 
bq4845/bq4845Y  
Parallel RTC With CPU Supervisor  
tects an out-of-tolerance condition, it  
generates an interrupt warning and  
General Description  
Features  
Real-Time Clock counts seconds  
The bq4845 Real-Time Clock is a  
low-power microprocessor periph-  
eral that integrates a time-of-day  
clock, a 100-year calendar, and a  
CPU supervisor in a 28-pin SOIC or  
DIP. The bq4845 is ideal for fax ma-  
chines, copiers, industrial control  
syst em s, poin t -of-sa le t er m in a ls,  
data loggers, and computers.  
subsequently a microprocessor reset.  
The reset stays active for 200ms after  
VCC rises within tolerance, to allow for  
power supply and processor stabiliza-  
tion.  
through years in BCD format  
On-chip battery-backup switchover  
circuit with nonvolatile control for  
external SRAM  
Th e bq4845 a ls o h a s a bu ilt -in  
watchdog timer to monitor processor  
operation. If the microprocessor does  
not toggle the watchdog input (WDI)  
within the programmed time-out pe-  
riod, the bq4845 asserts WDO and  
RST. WDI unconnected disables the  
watchdog timer.  
Less than 500nA of clock opera-  
tion current in backup mode  
Microprocessor reset valid to  
The bq4845 provides direct connec-  
tions for a 32.768KHz quartz crystal  
and a 3V backup battery. Through  
the use of the conditional chip en-  
a ble ou t pu t (CE OUT) a n d ba t t er y  
volt a ge ou t pu t (VOU T) p in s, t h e  
bq4845 can write-protect and make  
n on vola t ile external SRAMs. The  
ba cku p cell powers t he rea l-t im e  
clock and maintains SRAM infor-  
m a t ion in t h e a bsen ce of syst em  
voltage.  
VCC = VSS  
I n d ep en d en t wa t ch d og t im er  
with a programmable time-out  
period  
The bq4845 can generate other in-  
terrupts based on a clock alarm con-  
dit ion or a per iodic set t in g. Th e  
alarm interrupt can be set to occur  
from once per second to once per  
month. The alarm can be made active  
in the battery-backup mode to serve  
as a system wake-up call. For inter-  
rupts at a rate beyond once per sec-  
ond, the periodic interrupt can be pro-  
grammed with periods of 30.5µs to  
500ms.  
Power-fail interrupt warning  
Programmable clock alarm inter-  
r u pt a ct ive in ba t t er y-ba cku p  
mode  
Programmable periodic interrupt  
Battery-low warning  
The bq4845 contains a temperature-  
compensated reference and comparator  
circuit that monitors the status of its  
voltage supply. When the bq4845 de-  
Pin Names  
Pin Connections  
A0–A3  
Clock/control address  
inputs  
BC  
Backup battery input  
Back-up battery output  
Interrupt output  
Microprocessor reset  
Watchdog input  
Watchdog output  
+5V supply  
V
28  
1
V
CC  
OUT  
VOUT  
INT  
X
1
X
2
27  
26  
2
3
WE  
CE  
DQ0–DQ7 Data inputs/outputs  
IN  
4
CE  
BC  
WDO  
INT  
RST  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
OUT  
WE  
OE  
Write enable  
5
6
WDI  
OE  
RST  
WDI  
WDO  
VCC  
VSS  
Output enable  
Chip select input  
A
3
7
A
A
A
8
9
CS  
2
1
0
CS  
V
SS  
10  
11  
12  
13  
14  
DQ  
7
CEIN  
External RAM chip  
enable  
DQ  
DQ  
8
DQ  
5
0
DQ  
1
DQ  
2
DQ  
4
V
SS  
DQ  
3
CEOUT  
X1–X2  
Conditional RAM chip  
enable  
Ground  
28-DIP or SOIC  
PN484501.eps  
Crystal inputs  
Aug. 1995  
1

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