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BP45F0044 PDF预览

BP45F0044

更新时间: 2024-04-09 19:03:10
品牌 Logo 应用领域
台湾合泰/盛群 - HOLTEK 无线
页数 文件大小 规格书
77页 1261K
描述
Wireless Charger Flash MCU

BP45F0044 数据手册

 浏览型号BP45F0044的Datasheet PDF文件第4页浏览型号BP45F0044的Datasheet PDF文件第5页浏览型号BP45F0044的Datasheet PDF文件第6页浏览型号BP45F0044的Datasheet PDF文件第8页浏览型号BP45F0044的Datasheet PDF文件第9页浏览型号BP45F0044的Datasheet PDF文件第10页 
BP45F0044  
Wireless Charger Flash MCU  
Pin Assignment  
SOURCE  
SW  
VSS  
1
2
3
4
8
7
6
5
PA3/OCPI  
VDD  
PA1  
PA2/PWMB/ICPCK  
PA0/TC/OCPCOUT/ICPDA  
BP45F0044  
8 SOP-A  
SW  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
SOURCE  
PA3/OCPI  
VSS  
VDD  
PA1  
PA2/PWMB/ICPCK  
PA0/TC/OCPCOUT/ICPDA  
NC  
NC  
NC  
NC  
NC  
NC  
OCDSCK  
OCDSDA  
BP45V0044  
16 NSOP-A  
Note: 1. The desired pin-shared function is determined by the corresponding pin-shared control bits.  
2. The OCDSDA and OCDSCK pins are supplied for the OCDS dedicated pins and as such only available  
for the BP45V0044 device which is the OCDS EV chip for the BP45F0044 device.  
3. The 16-pin NSOP-A package type is only for OCDS EV chip.  
4. For the unbounded pin PA4, the pin status should be properly configured to avoid the current consumption  
resulting from an input floating condition. Refer to the “Standby Current Considerations” and “Input/  
Output Ports” sections.  
Pin Description  
The function of each pin is listed in the following table, however the details behind how each pin is  
configured is contained in other sections of the datasheet.  
Pin Name  
Function OPT  
I/T  
O/T  
Description  
PAS  
PA0  
TC  
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up  
PAWU  
PA0/TC/  
OCPCOUT/  
ICPDA  
PAS  
ST  
Timer/Event Counter clock input  
OCPCOUT PAS  
CMOS OCP comparator output  
ICPDA  
ST CMOS ICP Data/Address pin  
PAS  
PA1  
PA1  
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up  
PAWU  
PAS  
PA2  
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up  
PAWU  
PA2/PWMB/  
ICPCK  
PWMB  
ICPCK  
PAS  
CMOS PWM signal inverting output  
ICP clock pin  
ST  
PAS  
PA3  
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up  
PAWU  
PA3/OCPI  
OCPI  
SW  
PAS  
AN  
OCP input  
SW  
NMOS NMOS drain terminal  
NMOS NMOS source terminal  
SOURCE  
VDD  
SOURCE  
VDD  
PWR  
PWR  
Positive power supply  
VSS  
VSS  
Negative power supply, ground  
Rev. 1.00  
7
March 17, 2020  

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