Datasheet > AX88796L

AX88796L

更新时间： 2024-02-21 21:25:17

品牌	Logo	应用领域
亚信 - ASIX		控制器以太网
页数	文件大小	规格书
71页	918K
描述
3-in-1 Local Bus Fast Ethernet Controller

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

AX88796L 技术参数

是否Rohs认证：	符合	生命周期：	Contact Manufacturer
包装说明：	QFP, QFP128,.63X.87,20	Reach Compliance Code：	compliant
HTS代码：	8542.31.00.01	风险等级：	5.34
JESD-30 代码：	R-PQFP-G128	端子数量：	128
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP128,.63X.87,20	封装形状：	RECTANGULAR
封装形式：	FLATPACK	电源：	3.3 V
认证状态：	Not Qualified	子类别：	Serial IO/Communication Controllers
最大压摆率：	120 mA	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN	Base Number Matches：	1

AX88796L 数据手册

AX88796 L

3-in-1 Local Bus Fast Ethernet Controller

1.0 Introduction

1.1 General Description:

The AX88796 provides industrial standard NE2000 registers level compatible instruction set. Various drivers are easy

acquired, maintenance and usage. No much additional effort to be paid. Software is easily port to various embedded

systems with no pain and tears

The AX88796 Fast Ethernet Controller is a high performance and highly integrated local CPU bus Ethernet Controller

with embedded 10/100Mbps PHY/Transceiver and 8K*16 bit SRAM. The AX88796 supports both 8 bit and 16 bit local

CPU interfaces include MCS-51 series, 80186 series, MC68K series CPU and ISA bus. The AX88796 implements both

10Mbps and 100Mbps Ethernet function based on IEEE802.3 / IEEE802.3u LAN standard. The AX88796 also provides

an extra IEEE802.3u compliant media-independent interface (MII) to support other media applications. Using MII

interface, Home LAN PHY type media can be supported.

As well as, the chip also provides optional Standard Print Port ( parallel port interface ), can be used for printer server

device or treat as simple general I/O port. The chip also support upto 3/1 additional General Purpose In/Out pins

The main difference between AX88796 and AX88195 are : 1) Embedded packet buffer memory 2) Built-in 10/100Mbps

PHY/Transceiver 3) Replace memory I/F with PHY/Transceiver I/F. 4) Canceling SAX address decoding. 5) Fix

interrupt status can’t always clean up problem of AX88195. 6) Add upto 3/1 general Purpose In/Out pins.

AX88796 use 128-pin LQFP low profile package, 25MHz operation, and single 3.3V operation with 5V I/O tolerance.

The ultra low power consumption is an outstanding feature and enlarges the application field. It is suitable for some

power consumption sensitive product like small size embedded products, PDA (Personal Digital Assistant) and Palm

size computer …etc.

1.2 AX88796 Block Diagram:

SMDC

SMDIO

8K* 16 SRAM

STA

and Memory Arbiter

EECS

EECK

EEDI

EEDO

TPI, TPO

MII I/F

MAC

Core

SEEPROM

I/F

Remote

DMA

FIFOs

PHY+

Tranceiver

SPP

/ GPIO

NE2000

Registers

Print Port

General

I/O

Host Interface

Ctl BUS

SA[9:0]

SD[15:0]

Fig - 1 AX88796 Block Diagram

ASIX ELECTRONICS CORPORATION

1 2 3 456 7 8...71

下载PDF

与AX88796L相关器件

型号	品牌	描述	获取价格	数据表
AX88796LF	ETC	High-Performance Non-PCI Single-Chip 8/16 bit 10/100M Fast Ethernet Controller	获取价格
AX88850	ASIX	100BASE-TX/FX Repeater Controller	获取价格
AX88851	ASIX	100BASE-TX/FX Repeater Controller	获取价格
AX88852	ASIX	100BASE-TX/FX Repeater Controller	获取价格
AX88853	ASIX	100BASE-TX/FX Repeater Controller	获取价格
AX88854	ASIX	100BASE-TX/FX Repeater Controller	获取价格

与AX88796L相关文章

PCF8574资料解读：主要参数分析、引脚说明
2024-05-21

7
AD637数据手册解读：主要特性、引脚及其功能解读、电气参数
2024-05-21

6
ADUM1201资料手册解读：参数分析、引脚说明、应用分析
2024-05-21

9
一文带你了解压敏电阻器在直流电路中的过压保护作用
2024-05-21

5

产品中心

服务支持

精选活动

关于我们

帮助中心

AX88796L

AX88796L 技术参数

AX88796L 数据手册

与AX88796L相关器件

与AX88796L相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

AX88796L

AX88796L 技术参数

AX88796L 数据手册

与AX88796L相关器件

与AX88796L相关文章

您还可以找

您在本页遇到什么问题？