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ATxmega128C3 PDF预览

ATxmega128C3

更新时间: 2023-12-06 20:01:49
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
358页 8102K
描述
Support for the ATxmega128C3 within Microchip Studio 6.1 requires a device support package: DOWNLO

ATxmega128C3 数据手册

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3.  
Atmel AVR CPU  
3.1  
Features  
8/16-bit, high-performance Atmel AVR RISC CPU  
142 instructions  
Hardware multiplier  
32x8-bit registers directly connected to the ALU  
Stack in RAM  
Stack pointer accessible in I/O memory space  
Direct addressing of up to 16MB of program memory and 16MB of data memory  
True 16/24-bit access to 16/24-bit I/O registers  
Efficient support for 8-, 16-, and 32-bit arithmetic  
Configuration change protection of system-critical features  
3.2  
3.3  
Overview  
All Atmel AVR XMEGA devices use the 8/16-bit AVR CPU. The main function of the CPU is to execute the code and  
perform all calculations. The CPU is able to access memories, perform calculations, control peripherals, and execute the  
program in the flash memory. Interrupt handling is described in a separate section, “Interrupts and Programmable  
Multilevel Interrupt Controller” on page 112.  
Architectural Overview  
In order to maximize performance and parallelism, the AVR CPU uses a Harvard architecture with separate memories  
and buses for program and data. Instructions in the program memory are executed with single-level pipelining. While one  
instruction is being executed, the next instruction is pre-fetched from the program memory. This enables instructions to  
be executed on every clock cycle. For a summary of all AVR instructions, refer to “Instruction Set Summary” on page  
343. For details of all AVR instructions, refer to http://www.atmel.com/avr.  
Figure 3-1. Block Diagram of the AVR CPU Architecture  
XMEGA C [MANUAL]  
Atmel-8465H-AVR-XMEGA C-12/2014  
7

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