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ATXMEGA128A3-MH-SL383 PDF预览

ATXMEGA128A3-MH-SL383

更新时间: 2024-02-15 10:47:59
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟微控制器
页数 文件大小 规格书
120页 3566K
描述
Microcontroller, 16-Bit, FLASH, AVR RISC CPU, 32MHz, CMOS, 9 X 9 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, MO-220VMMD, QFN-64

ATXMEGA128A3-MH-SL383 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:HVQCCN, LCC64,.35SQ,20
Reach Compliance Code:unknown风险等级:5.84
具有ADC:YES其他特性:ALSO OPERATES AT 1.6V MINIMUM SUPPLY AT 12 MHZ
地址总线宽度:位大小:16
CPU系列:AVR RISC最大时钟频率:32 MHz
DAC 通道:YESDMA 通道:YES
外部数据总线宽度:JESD-30 代码:S-XQCC-N64
JESD-609代码:e3长度:9 mm
湿度敏感等级:1I/O 线路数量:50
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC64,.35SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):225
电源:1.8/3.3 V认证状态:Not Qualified
RAM(字节):8192ROM(单词):131072
ROM可编程性:FLASH座面最大高度:1 mm
速度:32 MHz子类别:Microcontrollers
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:9 mm
Base Number Matches:1

ATXMEGA128A3-MH-SL383 数据手册

 浏览型号ATXMEGA128A3-MH-SL383的Datasheet PDF文件第1页浏览型号ATXMEGA128A3-MH-SL383的Datasheet PDF文件第2页浏览型号ATXMEGA128A3-MH-SL383的Datasheet PDF文件第3页浏览型号ATXMEGA128A3-MH-SL383的Datasheet PDF文件第5页浏览型号ATXMEGA128A3-MH-SL383的Datasheet PDF文件第6页浏览型号ATXMEGA128A3-MH-SL383的Datasheet PDF文件第7页 
XMEGA A3  
3. Overview  
The Atmel® AVR® XMEGAA3 is a family of low power, high performance and peripheral rich  
CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing  
powerful instructions in a single clock cycle, the XMEGA A3 achieves throughputs approaching  
1 Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize  
power consumption versus processing speed.  
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the  
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent  
registers to be accessed in one single instruction, executed in one clock cycle. The resulting  
architecture is more code efficient while achieving throughputs many times faster than conven-  
tional single-accumulator or CISC based microcontrollers.  
The XMEGA A3 devices provide the following features: In-System Programmable Flash with  
Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,  
eight-channel Event System, Programmable Multi-level Interrupt Controller, 50 general purpose  
I/O lines, 16-bit Real Time Counter (RTC), seven flexible 16-bit Timer/Counters with compare  
modes and PWM, seven USARTs, two Two Wire Serial Interfaces (TWIs), three Serial Periph-  
eral Interfaces (SPIs), AES and DES crypto engine, two 8-channel 12-bit ADCs with optional  
differential input with programmable gain, one 2-channel 12-bit DACs, four analog comparators  
with window mode, programmable Watchdog Timer with separate Internal Oscillator, accurate  
internal oscillators with PLL and prescaler and programmable Brown-Out Detection.  
The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,  
is available. The devices also have an IEEE std. 1149.1 compliant JTAG test interface, and this  
can also be used for On-chip Debug and programming.  
The XMEGA A3 devices have five software selectable power saving modes. The Idle mode  
stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and  
all peripherals to continue functioning. The Power-down mode saves the SRAM and register  
contents but stops the oscillators, disabling all other functions until the next TWI or pin-change  
interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,  
allowing the application to maintain a timer base while the rest of the device is sleeping. In  
Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is  
sleeping. This allows very fast start-up from external crystal combined with low power consump-  
tion. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue  
to run. To further reduce power consumption, the peripheral clock for each individual peripheral  
can optionally be stopped in Active mode and Idle sleep mode.  
The device is manufactured using Atmel's high-density nonvolatile memory technology. The pro-  
gram Flash memory can be reprogrammed in-system through the PDI or JTAG. A Bootloader  
running in the device can use any interface to download the application program to the Flash  
memory. The Bootloader software in the Boot Flash section will continue to run while the Appli-  
cation Flash section is updated, providing true Read-While-Write operation. By combining an  
8/16-bit RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA A3 is a power-  
ful microcontroller family that provides a highly flexible and cost effective solution for many  
embedded applications.  
The XMEGA A3 devices are supported with a full suite of program and system development  
tools including: C compilers, macro assemblers, program debugger/simulators, programmers,  
and evaluation kits.  
4
8068S–AVR–09/10  

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